diff --git a/.idea/vcs.xml b/.idea/vcs.xml
index 94a25f7..ed50edc 100644
--- a/.idea/vcs.xml
+++ b/.idea/vcs.xml
@@ -2,5 +2,6 @@
 <project version="4">
   <component name="VcsDirectoryMappings">
     <mapping directory="$PROJECT_DIR$" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/doc/asmbench-SC18SRC-poster" vcs="Git" />
   </component>
 </project>
\ No newline at end of file
diff --git a/setup.py b/setup.py
index 03608c3..687a9f3 100644
--- a/setup.py
+++ b/setup.py
@@ -6,7 +6,7 @@ with open('README.rst') as f:
 
 setup(
     name='asmbench',
-    version='0.1.2',
+    version='0.1.3',
     packages=find_packages(exclude=['contrib', 'docs', 'tests*']),
     url='https://github.com/RRZE-HPC/asmbench',
     license='AGPLv3',
diff --git a/tablegen.py b/tablegen.py
index 9e779ac..44a2dd8 100755
--- a/tablegen.py
+++ b/tablegen.py
@@ -444,9 +444,9 @@ def main():
     bench.setup_llvm()
 
     # Benchmark TP and Lat for each instruction
-    # for instr_name, instr_op in instructions.items():
-    #     tp, lat = bench.bench_instructions([instr_op])
-    #     print("{:>12} {:>5.2f} {:>5.2f}".format(instr_name, tp, lat))
+    for instr_name, instr_op in instructions.items():
+        tp, lat = bench.bench_instructions([instr_op])
+        print("{:>12} {:>5.2f} {:>5.2f}".format(instr_name, tp, lat))
 
     # Benchmark TP and Lat for all valid instruction pairs
     # for a,b in itertools.combinations(instructions, 2):