mirror of
https://github.com/RRZE-HPC/OSACA.git
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827 lines
29 KiB
Python
Executable File
827 lines
29 KiB
Python
Executable File
#!/apps/python/3.5-anaconda/bin/python
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import argparse
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import sys
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import subprocess
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import os
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import re
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from Params import *
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from EUsched import *
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from Testcase import *
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import pandas as pd
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from datetime import datetime
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import numpy as np
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class Osaca(object):
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arch = None
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filepath = None
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srcCode = None
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df = None
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instrForms = None
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# Variables for checking lines
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numSeps = 0
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indentChar = ''
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sem = 0
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marker = r'//STARTLOOP'
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# Variables for creating output
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longestInstr = 30
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# Constants
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ASM_LINE = re.compile(r'\s[0-9a-f]+[:]')
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# Matches every variation of the IACA start marker
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IACA_SM = re.compile(r'\s*movl[ \t]+\$111[ \t]*,[ \t]*%ebx[ \t]*\n\s*\.byte[ \t]+100[ \t]*((,[ \t]*103[ \t]*((,[ \t]*144)|(\n\s*\.byte[ \t]+144)))|(\n\s*\.byte[ \t]+103[ \t]*((,[ \t]*144)|(\n\s*\.byte[ \t]+144))))')
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# Matches every variation of the IACA end marker
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IACA_EM = re.compile(r'\s*movl[ \t]+\$222[ \t]*,[ \t]*%ebx[ \t]*\n\s*\.byte[ \t]+100[ \t]*((,[ \t]*103[ \t]*((,[ \t]*144)|(\n\s*\.byte[ \t]+144)))|(\n\s*\.byte[ \t]+103[ \t]*((,[ \t]*144)|(\n\s*\.byte[ \t]+144))))')
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def __init__(self, _arch, _filepath):
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self.arch = _arch
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self.filepath = _filepath
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self.instrForms = []
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##-------------------main functions depending on arguments----------------------
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def include_ibench(self):
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"""
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Reads ibench output and includes it in the architecture specific csv
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file.
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"""
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# Check args and exit program if something's wrong
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if(not self.check_arch()):
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print('Invalid microarchitecture.')
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sys.exit()
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if(not self.check_file()):
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print('Invalid file path or file format.')
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sys.exit()
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# Check for database for the chosen architecture
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self.df = self.read_csv()
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# Create sequence of numbers and their reciprokals for validate the measurements
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cycList,reciList = self.create_sequences()
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print('Everything seems fine! Let\'s start!')
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newData = []
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addedValues = 0
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for line in self.srcCode:
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if('Using frequency' in line or len(line) == 0):
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continue
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clmn = 'LT'
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instr = line.split()[0][:-1]
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if('TP' in line):
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# We found a command with a throughput value. Get instruction and the number of
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# clock cycles and remove the '-TP' suffix.
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clmn = 'TP'
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instr = instr[:-3]
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# Otherwise it is a latency value. Nothing to do.
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clkC = line.split()[1]
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clkC_tmp = clkC
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clkC = self.validate_val(clkC, instr, True if (clmn == 'TP') else False, cycList, reciList)
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txtOutput = True if (clkC_tmp == clkC) else False
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val = -2
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new = False
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try:
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entry = self.df.loc[lambda df: df.instr == instr,clmn]
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val = entry.values[0]
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except IndexError:
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# Instruction not in database yet --> add it
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new = True
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# First check if LT or TP value has already been added before
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for i,item in enumerate(newData):
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if(instr in item):
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if(clmn == 'TP'):
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newData[i][1] = clkC
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elif(clmn == 'LT'):
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newData[i][2] = clkC
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new = False
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break
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if(new and clmn == 'TP'):
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newData.append([instr,clkC,'-1',((-1,),)])
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elif(new and clmn == 'LT'):
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newData.append([instr,'-1',clkC,((-1,),)])
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new = True
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addedValues += 1
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pass
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# If val is -1 (= not filled with a valid value) add it immediately
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if(val == -1):
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self.df.set_value(entry.index[0], clmn, clkC)
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addedValues += 1
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continue
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if(not new and abs((val/np.float64(clkC))-1) > 0.05):
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print('Different measurement for {} ({}): {}(old) vs. {}(new)\nPlease check for correctness (no changes were made).'.format(instr, clmn, val, clkC))
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txtOutput = True
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if(txtOutput):
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print()
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txtOutput = False
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# Now merge the DataFrames and write new csv file
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self.df = self.df.append(pd.DataFrame(newData, columns=['instr','TP','LT','ports']), ignore_index=True)
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csv = self.df.to_csv(index=False)
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self.write_csv(csv)
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print('ibench output {} successfully in database included.'.format(self.filepath.split('/')[-1]))
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print('{} values were added.'.format(addedValues))
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def inspect_binary(self):
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"""
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Main function of OSACA. Inspect binary file and create analysis.
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"""
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# Check args and exit program if something's wrong
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if(not self.check_arch()):
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print('Invalid microarchitecture.')
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sys.exit()
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if(not self.check_elffile()):
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print('Invalid file path or file format.')
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sys.exit()
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# Finally check for database for the chosen architecture
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self.read_csv()
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print('Everything seems fine! Let\'s start checking!')
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for i,line in enumerate(self.srcCode):
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if(i == 0):
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self.check_line(line, True)
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else:
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self.check_line(line)
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output = self.create_output()
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print(output)
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def inspect_with_iaca(self):
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"""
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Main function of OSACA with IACA markers instead of OSACA marker.
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Inspect binary file and create analysis.
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"""
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# Check args and exit program if something's wrong
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if(not self.check_arch()):
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print('Invalid microarchitecture.')
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sys.exit()
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# Check if input file is a binary or assembly file
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try:
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binaryFile = True
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if(not self.check_elffile()):
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print('Invalid file path or file format.')
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sys.exit()
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except (TypeError,IndexError):
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binaryFile = False
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if(not self.check_file(True)):
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print('Invalid file path or file format.')
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sys.exit()
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# Finally check for database for the chosen architecture
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self.read_csv()
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print('Everything seems fine! Let\'s start checking!')
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if(binaryFile):
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self.iaca_bin()
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else:
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self.iaca_asm()
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output = self.create_output()
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print(output)
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##------------------------------------------------------------------------------
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def check_arch(self):
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"""
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Check if the architecture is valid.
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Returns
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-------
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bool
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True if arch is supported
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False if arch is not supported
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"""
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archList = ['SNB','IVB','HSW', 'BDW', 'SKL']
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if(self.arch in archList):
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return True
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else:
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return False
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def check_elffile(self):
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"""
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Check if the given filepath exists, if the format is the needed elf64
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and store file data in attribute srcCode.
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Returns
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-------
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bool
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True if file is expected elf64 file
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False if file does not exist or is not an elf64 file
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"""
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if(os.path.isfile(self.filepath)):
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self.store_srcCode_elf()
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if('file format elf64' in self.srcCode[1]):
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return True
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return False
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def check_file(self,iacaFlag=False):
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"""
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Check if the given filepath exists and store file data in attribute
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srcCode.
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Parameters
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----------
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iacaFlag : bool
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store file data as a string in attribute srcCode if True,
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store it as a list of strings (lines) if False (default False)
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Returns
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-------
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bool
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True if file exists
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False if file does not exist
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"""
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if(os.path.isfile(self.filepath)):
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self.store_srcCode(iacaFlag)
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return True
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return False
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def store_srcCode_elf(self):
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"""
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Load binary file compiled with '-g' in class attribute srcCode and
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separate by line.
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"""
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self.srcCode = subprocess.run(['objdump', '--source', self.filepath], stdout=subprocess.PIPE).stdout.decode('utf-8').split('\n')
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def store_srcCode(self,iacaFlag=False):
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"""
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Load arbitrary file in class attribute srcCode.
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Parameters
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----------
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iacaFlag : bool
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store file data as a string in attribute srcCode if True,
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store it as a list of strings (lines) if False (default False)
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"""
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try:
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f = open(self.filepath, 'r')
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except IOError:
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print('IOError: file \'{}\' not found'.format(self.filepath))
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self.srcCode = ''
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for line in f:
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self.srcCode += line
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f.close()
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if(iacaFlag):
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return
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self.srcCode = self.srcCode.split('\n')
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def read_csv(self):
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"""
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Reads architecture dependent CSV from data directory.
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Returns
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-------
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DataFrame
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CSV as DataFrame object
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"""
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currDir = '/'.join(os.path.realpath(__file__).split('/')[:-1])
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df = pd.read_csv(currDir+'/data/'+self.arch.lower()+'_data.csv')
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return df
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def write_csv(self,csv):
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"""
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Writes architecture dependent CSV into data directory.
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Parameters
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----------
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csv : str
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CSV data as string
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"""
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try:
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f = open('data/'+self.arch.lower()+'_data.csv', 'w')
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except IOError:
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print('IOError: file \'{}\' not found in ./data'.format(self.arch.lower()+'_data.csv'))
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f.write(csv)
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f.close()
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def create_sequences(self,end=101):
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"""
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Creates list of integers from 1 to end and list of their reciprocals.
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Parameters
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----------
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end : int
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End value for list of integers (default 101)
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Returns
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-------
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[int]
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cycList of integers
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[float]
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reciList of floats
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"""
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cycList = []
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reciList = []
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for i in range(1, end):
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cycList.append(i)
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reciList.append(1/i)
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return cycList,reciList
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def validate_val(self,clkC, instr, isTP, cycList, reciList):
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"""
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Validate given clock cycle clkC and return rounded value in case of
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success.
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A succeeded validation means the clock cycle clkC is only 5% higher or
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lower than an integer value from cycList or - if clkC is a throughput
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value - 5% higher or lower than a reciprocal from the reciList.
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Parameters
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----------
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clkC : float
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Clock cycle to validate
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instr : str
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Instruction for warning output
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isTP : bool
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True if a throughput value is to check, False for a latency value
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cycList : [int]
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Cycle list for validating
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reciList : [float]
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Reciprocal cycle list for validating
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Returns
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-------
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float
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Clock cycle, either rounded to an integer or its reciprocal or the
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given clkC parameter
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"""
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clmn = 'LT'
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if(isTP):
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clmn = 'TP'
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for i in range(0, len(cycList)):
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if(cycList[i]*1.05 > float(clkC) and cycList[i]*0.95 < float(clkC)):
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# Value is probably correct, so round it to the estimated value
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return cycList[i]
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# Check reciprocal only if it is a throughput value
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elif(isTP and reciList[i]*1.05 > float(clkC) and reciList[i]*0.95 < float(clkC)):
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# Value is probably correct, so round it to the estimated value
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return reciList[i]
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# No value close to an integer or its reciprocal found, we assume the
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# measurement is incorrect
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print('Your measurement for {} ({}) is probably wrong. Please inspect your benchmark!'.format(instr, clmn))
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print('The program will continue with the given value')
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return clkC
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def check_line(self,line,firstAppearance=False):
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"""
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Inspect line of source code and process it if inside the marked snippet.
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Parameter
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---------
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line : str
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Line of source code
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firstAppearance : bool
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Necessary for setting indenting character (default False)
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"""
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# Check if marker is in line
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if(self.marker in line):
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# First, check if high level code in indented with whitespaces or tabs
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if(firstAppearance):
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self.indentChar = self.get_indent_chars(line)
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# Now count the number of whitespaces
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self.numSeps = (re.split(self.marker, line)[0]).count(self.indentChar)
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self.sem = 2
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elif(self.sem > 0):
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# We're in the marked code snippet
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# Check if the line is ASM code and - if not - check if we're still in the loop
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match = re.search(self.ASM_LINE, line)
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if(match):
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# Further analysis of instructions
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# Check if there are comments in line
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if(r'//' in line):
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return
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self.check_instr(''.join(re.split(r'\t', line)[-1:]))
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elif((re.split(r'\S', line)[0]).count(self.indentChar) <= self.numSeps):
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# Not in the loop anymore - or yet. We decrement the semaphore
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self.sem = self.sem-1
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def get_indent_chars(self,line):
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"""
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Check if indentation characters are either tabulators or whitespaces
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Parameters
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----------
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line : str
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Line with start marker in it
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Returns
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-------
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str
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Indentation character as string
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"""
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numSpaces = (re.split(self.marker, line)[0]).count(' ')
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numTabs = (re.split(self.marker, line)[0]).count('\t')
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if(numSpaces != 0 and numTabs == 0):
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return ' '
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elif(numSpaces == 0 and numTabs != 0):
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return '\t'
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else:
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raise NotImplementedError('Indentation of code is only supported for whitespaces and tabs.')
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def iaca_bin(self):
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"""
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Extract instruction forms out of binary file using IACA markers.
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"""
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self.marker = r'fs addr32 nop'
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for line in self.srcCode:
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# Check if marker is in line
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if(self.marker in line):
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self.sem += 1
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elif(self.sem == 1):
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# We're in the marked code snippet
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# Check if the line is ASM code
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match = re.search(self.ASM_LINE, line)
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if(match):
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# Further analysis of instructions
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# Check if there are comments in line
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if(r'//' in line):
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continue
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# Do the same instruction check as for the OSACA marker line check
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self.check_instr(''.join(re.split(r'\t', line)[-1:]))
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elif(self.sem == 2):
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# Not in the loop anymore. Due to the fact it's the IACA marker we can stop here
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# After removing the last line which belongs to the IACA marker
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del self.instrForms[-1:]
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return
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def iaca_asm(self):
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"""
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Extract instruction forms out of assembly file using IACA markers.
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"""
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# Extract the code snippet surround by the IACA markers
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code = self.srcCode
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# Search for the start marker
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match = re.match(self.IACA_SM, code)
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while(not match):
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code = code.split('\n',1)[1]
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match = re.match(self.IACA_SM, code)
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# Search for the end marker
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code = (code.split('144',1)[1]).split('\n',1)[1]
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res = ''
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match = re.match(self.IACA_EM, code)
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while(not match):
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res += code.split('\n',1)[0]+'\n'
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code = code.split('\n',1)[1]
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match = re.match(self.IACA_EM, code)
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# Split the result by line go on like with OSACA markers
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res = res.split('\n')
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for line in res:
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line = line.split('#')[0]
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line = line.lstrip()
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if(len(line) == 0 or '//' in line or line.startswith('..')):
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continue
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self.check_instr(line)
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def check_instr(self,instr):
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"""
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Inspect instruction for its parameters and add it to the instruction forms
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pool instrForm.
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Parameters
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----------
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instr : str
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Instruction as string
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"""
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# Check for strange clang padding bytes
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while(instr.startswith('data32')):
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instr = instr[7:]
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# Separate mnemonic and operands
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mnemonic = instr.split()[0]
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params = ''.join(instr.split()[1:])
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# Check if line is not only a byte
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empty_byte = re.compile(r'[0-9a-f]{2}')
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if(re.match(empty_byte, mnemonic) and len(mnemonic) == 2):
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return
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# Check if there's one or more operands and store all in a list
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param_list = self.flatten(self.separate_params(params))
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param_list_types = list(param_list)
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# Check operands and separate them by IMMEDIATE (IMD), REGISTER (REG),
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# MEMORY (MEM) or LABEL(LBL)
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for i in range(len(param_list)):
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op = param_list[i]
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if(len(op) <= 0):
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op = Parameter('NONE')
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elif(op[0] == '$'):
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op = Parameter('IMD')
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elif(op[0] == '%' and '(' not in op):
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j = len(op)
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opmask = False
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if('{' in op):
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j = op.index('{')
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opmask = True
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op = Register(op[1:j], opmask)
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elif('<' in op or op.startswith('.')):
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op = Parameter('LBL')
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else:
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op = MemAddr(op)
|
|
param_list[i] = op.print()
|
|
param_list_types[i] = op
|
|
# Add to list
|
|
if(len(instr) > self.longestInstr):
|
|
self.longestInstr = len(instr)
|
|
instrForm = [mnemonic]+list(reversed(param_list_types))+[instr]
|
|
self.instrForms.append(instrForm)
|
|
# If flag is set, create testcase for instruction form
|
|
# Do this in reversed param list order, du to the fact it's intel syntax
|
|
# Only create benchmark if no label (LBL) is part of the operands
|
|
if('LBL' in param_list or '' in param_list):
|
|
return
|
|
tc = Testcase(mnemonic, list(reversed(param_list_types)), '64')
|
|
# Only write a testcase if it not already exists
|
|
writeTP, writeLT = tc._Testcase__is_in_dir()
|
|
tc.write_testcase(not writeTP, not writeLT)
|
|
|
|
|
|
def separate_params(self,params):
|
|
"""
|
|
Delete comments, separates parameters and return them as a list.
|
|
|
|
Parameters
|
|
----------
|
|
params : str
|
|
Splitted line after mnemonic
|
|
|
|
Returns
|
|
-------
|
|
[[...[str]]]
|
|
Nested list of strings. The number of nest levels depend on the
|
|
number of parametes given.
|
|
"""
|
|
param_list = [params]
|
|
if(',' in params):
|
|
if(')' in params):
|
|
if(params.index(')') < len(params)-1 and params[params.index(')')+1] == ','):
|
|
i = params.index(')')+1
|
|
elif(params.index('(') < params.index(',')):
|
|
return param_list
|
|
else:
|
|
i = params.index(',')
|
|
else:
|
|
i = params.index(',')
|
|
param_list = [params[:i],self.separate_params(params[i+1:])]
|
|
elif('#' in params):
|
|
i = params.index('#')
|
|
param_list = [params[:i]]
|
|
return param_list
|
|
|
|
def flatten(self,l):
|
|
"""
|
|
Flatten a nested list of strings.
|
|
|
|
Parameters
|
|
----------
|
|
l : [[...[str]]]
|
|
Nested list of strings
|
|
|
|
Returns
|
|
-------
|
|
[str]
|
|
List of strings
|
|
"""
|
|
if l == []:
|
|
return l
|
|
if(isinstance(l[0], list)):
|
|
return self.flatten(l[0]) + self.flatten(l[1:])
|
|
return l[:1] + self.flatten(l[1:])
|
|
|
|
|
|
def create_output(self,tp_list=False,pr_sched=True):
|
|
"""
|
|
Creates output of analysed file including a time stamp.
|
|
|
|
Parameters
|
|
----------
|
|
tp_list : bool
|
|
Boolean for indicating the need for the throughput list as output
|
|
(default False)
|
|
pr_sched : bool
|
|
Boolean for indicating the need for predicting a scheduling
|
|
(default True)
|
|
|
|
Returns
|
|
-------
|
|
str
|
|
OSACA output
|
|
"""
|
|
# Check the output alignment depending on the longest instruction
|
|
if(self.longestInstr > 70):
|
|
self.longestInstr = 70
|
|
horizLine = self.create_horiz_sep()
|
|
ws = ' '*(len(horizLine)-23)
|
|
# Write general information about the benchmark
|
|
output = ( '--'+horizLine+'\n'
|
|
'| Analyzing of file:\t'+os.path.abspath(self.filepath)+'\n'
|
|
'| Architecture:\t\t'+self.arch+'\n'
|
|
'| Timestamp:\t\t'+datetime.now().strftime('%Y-%m-%d %H:%M:%S')+'\n')
|
|
|
|
if(tp_list):
|
|
output += self.create_TP_list(horizLine)
|
|
if(pr_sched):
|
|
output += '\n\n'
|
|
sched = Scheduler(self.arch, self.instrForms)
|
|
schedOutput,portBinding = sched.schedule()
|
|
binding = sched.get_port_binding(portBinding)
|
|
output += sched.get_report_info()+'\n'+binding+'\n\n'+schedOutput
|
|
blockTP = round(max(portBinding), 2)
|
|
output += 'Total number of estimated throughput: '+str(blockTP)
|
|
return output
|
|
|
|
|
|
def create_horiz_sep(self):
|
|
"""
|
|
Calculate and return horizontal separator line.
|
|
|
|
Returns
|
|
-------
|
|
str
|
|
Horizontal separator line
|
|
"""
|
|
return '-'*(self.longestInstr+8)
|
|
|
|
|
|
def create_TP_list(self,horizLine):
|
|
"""
|
|
Create list of instruction forms with the proper throughput value.
|
|
|
|
Parameter
|
|
---------
|
|
horizLine : str
|
|
Calculated horizontal line for nice alignement
|
|
|
|
Returns
|
|
-------
|
|
str
|
|
Throughput list output for printing
|
|
"""
|
|
warning = False
|
|
ws = ' '*(len(horizLine)-23)
|
|
|
|
output = ('\n| INSTRUCTION'+ws+'CLOCK CYCLES\n'
|
|
'| '+horizLine+'\n|\n')
|
|
# Check for the throughput data in CSV
|
|
for elem in self.instrForms:
|
|
extension = ''
|
|
opExt = []
|
|
for i in range(1, len(elem)-1):
|
|
optmp = ''
|
|
if(isinstance(elem[i], Register) and elem[i].reg_type == 'GPR'):
|
|
optmp = 'r'+str(elem[i].size)
|
|
elif(isinstance(elem[i], MemAddr)):
|
|
optmp = 'mem'
|
|
else:
|
|
optmp = elem[i].print().lower()
|
|
opExt.append(optmp)
|
|
operands = '_'.join(opExt)
|
|
# Now look up the value in the dataframe
|
|
# Check if there is a stored throughput value in database
|
|
import warnings
|
|
warnings.filterwarnings("ignore", 'This pattern has match groups')
|
|
series = self.df['instr'].str.contains(elem[0]+'-'+operands)
|
|
if( True in series.values):
|
|
# It's a match!
|
|
notFound = False
|
|
try:
|
|
tp = self.df[self.df.instr == elem[0]+'-'+operands].TP.values[0]
|
|
except IndexError:
|
|
# Something went wrong
|
|
print('Error while fetching data from database')
|
|
continue
|
|
# Did not found the exact instruction form.
|
|
# Try to find the instruction form for register operands only
|
|
else:
|
|
opExtRegs = []
|
|
for operand in opExt:
|
|
try:
|
|
regTmp = Register(operand)
|
|
opExtRegs.append(True)
|
|
except KeyError:
|
|
opExtRegs.append(False)
|
|
pass
|
|
if(not True in opExtRegs):
|
|
# No register in whole instruction form. How can I find out what regsize we need?
|
|
print('Feature not included yet: ', end='')
|
|
print(elem[0]+' for '+operands)
|
|
tp = 0
|
|
notFound = True
|
|
warning = True
|
|
|
|
numWhitespaces = self.longestInstr-len(elem[-1])
|
|
ws = ' '*numWhitespaces+'| '
|
|
n_f = ' '*(5-len(str(tp)))+'*'
|
|
data = '| '+elem[-1]+ws+str(tp)+n_f+'\n'
|
|
output += data
|
|
continue
|
|
if(opExtRegs[0] == False):
|
|
# Instruction stores result in memory. Check for storing in register instead.
|
|
if(len(opExt) > 1):
|
|
if(opExtRegs[1] == True):
|
|
opExt[0] = opExt[1]
|
|
elif(len(optExt > 2)):
|
|
if(opExtRegs[2] == True):
|
|
opExt[0] = opExt[2]
|
|
if(len(opExtRegs) == 2 and opExtRegs[1] == False):
|
|
# Instruction loads value from memory and has only two operands. Check for
|
|
# loading from register instead
|
|
if(opExtRegs[0] == True):
|
|
opExt[1] = opExt[0]
|
|
if(len(opExtRegs) == 3 and opExtRegs[2] == False):
|
|
# Instruction loads value from memory and has three operands. Check for loading
|
|
# from register instead
|
|
opExt[2] = opExt[0]
|
|
operands = '_'.join(opExt)
|
|
# Check for register equivalent instruction
|
|
series = self.df['instr'].str.contains(elem[0]+'-'+operands)
|
|
if( True in series.values):
|
|
# It's a match!
|
|
notFound = False
|
|
try:
|
|
tp = self.df[self.df.instr == elem[0]+'-'+operands].TP.values[0]
|
|
|
|
except IndexError:
|
|
# Something went wrong
|
|
print('Error while fetching data from database')
|
|
continue
|
|
# Did not found the register instruction form. Set warning and go on with
|
|
# throughput 0
|
|
else:
|
|
tp = 0
|
|
notFound = True
|
|
warning = True
|
|
# Check the alignement again
|
|
numWhitespaces = self.longestInstr-len(elem[-1])
|
|
ws = ' '*numWhitespaces+'| '
|
|
n_f = ''
|
|
if(notFound):
|
|
n_f = ' '*(5-len(str(tp)))+'*'
|
|
data = '| '+elem[-1]+ws+'{:3.2f}'.format(tp)+n_f+'\n'
|
|
output += data
|
|
# Finally end the list of throughput values
|
|
numWhitespaces = self.longestInstr-27
|
|
ws = ' '+' '*numWhitespaces
|
|
output += '| '+horizLine+'\n'
|
|
if(warning):
|
|
output += ('\n\n* There was no throughput value found '
|
|
'for the specific instruction form.'
|
|
'\n Please create a testcase via the create_testcase-method '
|
|
'or add a value manually.')
|
|
return output
|
|
|
|
|
|
##------------------------------------------------------------------------------
|
|
##------------Main method--------------
|
|
def main():
|
|
# Parse args
|
|
parser = argparse.ArgumentParser(description='Analyzes a marked innermost loop snippet for a given architecture type and prints out the estimated average throughput')
|
|
parser.add_argument('-V', '--version', action='version', version='%(prog)s 0.1')
|
|
parser.add_argument('--arch', dest='arch', type=str, help='define architecture (SNB, IVB, HSW, BDW, SKL)')
|
|
parser.add_argument('filepath', type=str, help='path to object (Binary, ASM, CSV)')
|
|
group = parser.add_mutually_exclusive_group(required=False)
|
|
group.add_argument('-i', '--include-ibench', dest='incl', action='store_true', help='includes the given values in form of the output of ibench in the database')
|
|
group.add_argument('--iaca', dest='iaca', action='store_true', help='search for IACA markers instead the OSACA marker')
|
|
group.add_argument('-m', '--insert-marker', dest='insert_marker', action='store_true', help='try to find blocks probably corresponding to loops in assembly and insert IACA marker')
|
|
|
|
# Store args in global variables
|
|
inp = parser.parse_args()
|
|
if(inp.arch is None and inp.insert_marker is None):
|
|
raise ValueError('Please specify an architecture')
|
|
if(inp.arch is not None):
|
|
arch = inp.arch.upper()
|
|
filepath = inp.filepath
|
|
inclIbench = inp.incl
|
|
iacaFlag = inp.iaca
|
|
insert_m = inp.insert_marker
|
|
|
|
# Create Osaca object
|
|
if(inp.arch is not None):
|
|
osaca = Osaca(arch, filepath)
|
|
|
|
if(inclIbench):
|
|
osaca.include_ibench()
|
|
elif(iacaFlag):
|
|
osaca.inspect_with_iaca()
|
|
elif(insert_m):
|
|
try:
|
|
from kerncraft import iaca
|
|
except ImportError:
|
|
print('ImportError: Module kerncraft not installed. Use \'pip install --user kerncraft\' for installation.\nFor more information see https://github.com/RRZE-HPC/kerncraft')
|
|
sys.exit()
|
|
iaca.iaca_instrumentation(input_file=filepath, output_file=filepath,
|
|
block_selection='manual', pointer_increment=1)
|
|
else:
|
|
osaca.inspect_binary()
|
|
|
|
|
|
##------------Main method--------------
|
|
if __name__ == '__main__':
|
|
main()
|