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30 lines
911 B
Plaintext
30 lines
911 B
Plaintext
Metadata-Version: 2.1
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Name: asmbench
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Version: 0.1.4
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Summary: A Benchmark Toolkit for Assembly Instructions Using the LLVM JIT
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Home-page: https://github.com/RRZE-HPC/asmbench
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Author: Julian Hammer
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Author-email: julian.hammer@fau.de
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License: AGPLv3
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Description: asmbench
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========
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A benchmark toolkit for assembly instructions using the LLVM JIT.
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Usage
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=====
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To benchmark latency and throughput of a 64bit integer add use the following command:
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``python -m asmbench 'add {src:i64:r}, {srcdst:i64:r}'``
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To benchmark two instructions interleaved use this:
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``python -m asmbench 'add {src:i64:r}, {srcdst:i64:r}' 'sub {src:i64:r}, {srcdst:i64:r}'``
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To find out more add `-h` for help and `-v` for verbose mode.
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Platform: UNKNOWN
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Provides-Extra: iaca
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Provides-Extra: sc18src
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