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https://github.com/micropython/micropython.git
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268acb714d
This commit adds support for writing inline assembler functions when targeting a RV32IMC processor. Given that this takes up a bit of rodata space due to its large instruction decoding table and its extensive error messages, it is enabled by default only on offline targets such as mpy-cross and the qemu port. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
66 lines
1.6 KiB
Python
66 lines
1.6 KiB
Python
# test csr instructions
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# CSR 0x340 is `mscratch`. This test suite is only safe to run on a system
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# where it is known that there is no other code that can read from or write
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# to that register. The qemu port is one such system, as the CSR is only
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# accessed when a machine exception occurs, and at that point it doesn't matter
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# anymore whether these tests are running or not.
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@micropython.asm_rv32
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def csr():
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li(a0, 0)
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csrrw(zero, zero, 0x340) # All zeroes
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csrrs(a1, zero, 0x340) # Read zeroes
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c_bnez(a1, end)
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addi(a0, a0, 1)
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li(a1, 0xA5A5A5A5)
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li(a2, 0x5A5A5A5A)
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csrrs(a2, a1, 0x340) # Read zeroes, set 0xA5A5A5A5
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c_bnez(a2, end)
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addi(a0, a0, 1)
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csrrs(a3, zero, 0x340) # Read 0xA5A5A5A5
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bne(a3, a1, end)
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addi(a0, a0, 1)
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li(a2, 0xF0F0F0F0)
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csrrc(zero, a2, 0x340) # Clear upper half
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csrrs(a3, zero, 0x340) # Read 0x05050505
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xori(a2, a2, -1)
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and_(a2, a1, a2)
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bne(a2, a3, end)
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addi(a0, a0, 1)
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label(end)
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print(csr())
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@micropython.asm_rv32
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def csri():
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li(a0, 0)
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csrrwi(zero, 0x340, 15) # Write 0xF
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csrrs(a1, zero, 0x340) # Read 0xF
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csrrsi(a2, 0x340, 0) # Read
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bne(a1, a2, end)
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addi(a0, a0, 1)
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csrrci(a2, 0x340, 0) # Read
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bne(a1, a2, end)
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addi(a0, a0, 1)
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li(a2, 15)
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bne(a1, a2, end)
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addi(a0, a0, 1)
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csrrci(zero, 0x340, 1) # Clear bit 1
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csrrs(a1, zero, 0x340) # Read 0xE
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li(a2, 14)
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bne(a1, a2, end)
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addi(a0, a0, 1)
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csrrsi(zero, 0x340, 1) # Set bit 1
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csrrs(a1, zero, 0x340) # Read 0xF
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li(a2, 15)
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bne(a1, a2, end)
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addi(a0, a0, 1)
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label(end)
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print(csri())
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