mirror of
https://github.com/micropython/micropython.git
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268acb714d
This commit adds support for writing inline assembler functions when targeting a RV32IMC processor. Given that this takes up a bit of rodata space due to its large instruction decoding table and its extensive error messages, it is enabled by default only on offline targets such as mpy-cross and the qemu port. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
205 lines
4.6 KiB
Python
205 lines
4.6 KiB
Python
TEMPLATE3 = """
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@micropython.asm_rv32
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def f():
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{}({}, {}, {})
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"""
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TEMPLATE2 = """
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@micropython.asm_rv32
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def f():
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{}({}, {})
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"""
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TEMPLATE1 = """
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@micropython.asm_rv32
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def f():
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{}({})
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"""
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REGISTERS = [
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"zero",
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"s0",
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"s1",
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"s2",
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"s3",
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"s4",
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"s5",
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"s6",
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"s7",
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"s8",
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"s9",
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"s10",
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"s11",
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"a0",
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"a1",
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"a2",
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"a3",
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"a4",
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"a5",
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"a6",
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"a7",
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"tp",
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"gp",
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"sp",
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"ra",
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"t0",
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"t1",
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"t2",
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"t3",
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"t4",
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"t5",
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"t6",
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"x0",
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"x1",
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"x2",
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"x3",
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"x4",
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"x5",
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"x6",
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"x7",
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"x8",
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"x9",
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"x10",
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"x11",
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"x12",
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"x13",
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"x14",
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"x15",
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"x16",
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"x17",
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"x18",
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"x19",
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"x20",
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"x21",
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"x22",
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"x23",
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"x24",
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"x25",
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"x26",
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"x27",
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"x28",
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"x29",
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"x30",
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"x31",
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]
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def harness(opcode, fragment, tag):
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try:
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exec(fragment)
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except SyntaxError:
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print(tag, opcode)
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for opcode in ("slli", "srli", "srai"):
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harness(opcode, TEMPLATE3.format(opcode, "a0", "a0", -1), "-")
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harness(opcode, TEMPLATE3.format(opcode, "a0", "a0", 33), "+")
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for opcode in ("c_slli", "c_srli", "c_srai"):
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harness(opcode, TEMPLATE2.format(opcode, "a0", -1), "-")
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harness(opcode, TEMPLATE2.format(opcode, "a0", 33), "+")
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harness("c_slli", TEMPLATE2.format("c_slli", "zero", 0), "0")
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harness("c_slli", TEMPLATE2.format("c_slli", "x0", 0), "0")
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for opcode in ("c_srli", "c_srai"):
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for register in REGISTERS:
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harness(opcode, TEMPLATE2.format(opcode, register, 0), register)
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for opcode in ("c_mv", "c_add"):
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harness(opcode, TEMPLATE2.format(opcode, "a0", "zero"), "0l")
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harness(opcode, TEMPLATE2.format(opcode, "zero", "a0"), "0r")
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harness(opcode, TEMPLATE2.format(opcode, "zero", "zero"), "0b")
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harness("c_jr", TEMPLATE1.format("c_jr", "zero"), "0")
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for opcode in ("addi", "andi", "ori", "slti", "sltiu", "xori"):
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harness(opcode, TEMPLATE3.format(opcode, "a0", "a0", 0x7FF), ">=s")
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harness(opcode, TEMPLATE3.format(opcode, "a0", "a0", 0x800), ">s")
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harness(opcode, TEMPLATE3.format(opcode, "a0", "a0", -2048), "<=s")
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harness(opcode, TEMPLATE3.format(opcode, "a0", "a0", -2049), "<s")
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for opcode in ("lb", "lbu", "lh", "lhu", "lw", "sb", "sh", "sw"):
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TEMPLATE = """
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@micropython.asm_rv32
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def f():
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{}(a0, {}(a0))
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"""
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harness(opcode, TEMPLATE.format(opcode, 0x7FF), ">=s")
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harness(opcode, TEMPLATE.format(opcode, 0x800), ">s")
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harness(opcode, TEMPLATE.format(opcode, -2048), "<=s")
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harness(opcode, TEMPLATE.format(opcode, -2049), "<s")
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harness("c_addi", TEMPLATE2.format("c_andi", "zero", 0), "00")
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harness("c_addi", TEMPLATE2.format("c_andi", "zero", 512), ">0")
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harness("c_addi", TEMPLATE2.format("c_andi", "zero", -512), "<0")
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harness("c_addi", TEMPLATE2.format("c_andi", "s0", 0), "s0")
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harness("c_addi", TEMPLATE2.format("c_andi", "s0", -100), "<s")
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harness("c_addi", TEMPLATE2.format("c_andi", "s0", 100), ">s")
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harness("c_andi", TEMPLATE2.format("c_andi", "zero", 0), "00")
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harness("c_andi", TEMPLATE2.format("c_andi", "zero", 512), ">0")
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harness("c_andi", TEMPLATE2.format("c_andi", "zero", -512), "<0")
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harness("c_andi", TEMPLATE2.format("c_andi", "s0", 0), "s0")
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harness("c_andi", TEMPLATE2.format("c_andi", "s0", -100), "<s")
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harness("c_andi", TEMPLATE2.format("c_andi", "s0", 100), ">s")
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C_REGISTERS = (
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"a0",
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"a1",
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"a2",
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"a3",
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"a4",
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"a5",
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"s0",
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"s1",
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"x8",
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"x9",
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"x10",
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"x11",
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"x12",
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"x13",
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"x14",
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"x15",
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)
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for opcode in ("c_and", "c_or", "c_xor"):
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for source in REGISTERS:
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for destination in REGISTERS:
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if source in C_REGISTERS and destination in C_REGISTERS:
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try:
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exec(
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"""
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@micropython.asm_rv32
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def f():
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{}({}, {})
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""".format(opcode, source, destination)
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)
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except SyntaxError:
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print(source, destination, opcode)
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else:
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try:
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exec(
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"""
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@micropython.asm_rv32
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def f():
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{}({}, {})
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""".format(opcode, source, destination)
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)
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print(source, destination, opcode)
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except SyntaxError:
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pass
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print(opcode)
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for opcode in ("c_lw", "c_sw"):
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TEMPLATE = """
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@micropython.asm_rv32
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def f():
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{}(a0, {}(a0))
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"""
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harness(opcode, TEMPLATE.format(opcode, 60), ">=s")
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harness(opcode, TEMPLATE.format(opcode, 61), ">s")
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harness(opcode, TEMPLATE.format(opcode, -60), "<=s")
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harness(opcode, TEMPLATE.format(opcode, -61), "<s")
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