Files
micropython/tests/inlineasm/rv32/asmsanity.py.exp
Alessandro Gatti 268acb714d py/emitinlinerv32: Add inline assembler support for RV32.
This commit adds support for writing inline assembler functions when
targeting a RV32IMC processor.

Given that this takes up a bit of rodata space due to its large
instruction decoding table and its extensive error messages, it is
enabled by default only on offline targets such as mpy-cross and the
qemu port.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2025-01-02 11:49:10 +11:00

163 lines
1.5 KiB
Plaintext

- slli
+ slli
- srli
+ srli
- srai
+ srai
- c_slli
+ c_slli
- c_srli
+ c_srli
- c_srai
+ c_srai
0 c_slli
0 c_slli
zero c_srli
s2 c_srli
s3 c_srli
s4 c_srli
s5 c_srli
s6 c_srli
s7 c_srli
s8 c_srli
s9 c_srli
s10 c_srli
s11 c_srli
a6 c_srli
a7 c_srli
tp c_srli
gp c_srli
sp c_srli
ra c_srli
t0 c_srli
t1 c_srli
t2 c_srli
t3 c_srli
t4 c_srli
t5 c_srli
t6 c_srli
x0 c_srli
x1 c_srli
x2 c_srli
x3 c_srli
x4 c_srli
x5 c_srli
x6 c_srli
x7 c_srli
x16 c_srli
x17 c_srli
x18 c_srli
x19 c_srli
x20 c_srli
x21 c_srli
x22 c_srli
x23 c_srli
x24 c_srli
x25 c_srli
x26 c_srli
x27 c_srli
x28 c_srli
x29 c_srli
x30 c_srli
x31 c_srli
zero c_srai
s2 c_srai
s3 c_srai
s4 c_srai
s5 c_srai
s6 c_srai
s7 c_srai
s8 c_srai
s9 c_srai
s10 c_srai
s11 c_srai
a6 c_srai
a7 c_srai
tp c_srai
gp c_srai
sp c_srai
ra c_srai
t0 c_srai
t1 c_srai
t2 c_srai
t3 c_srai
t4 c_srai
t5 c_srai
t6 c_srai
x0 c_srai
x1 c_srai
x2 c_srai
x3 c_srai
x4 c_srai
x5 c_srai
x6 c_srai
x7 c_srai
x16 c_srai
x17 c_srai
x18 c_srai
x19 c_srai
x20 c_srai
x21 c_srai
x22 c_srai
x23 c_srai
x24 c_srai
x25 c_srai
x26 c_srai
x27 c_srai
x28 c_srai
x29 c_srai
x30 c_srai
x31 c_srai
0l c_mv
0r c_mv
0b c_mv
0l c_add
0r c_add
0b c_add
0 c_jr
>s addi
<s addi
>s andi
<s andi
>s ori
<s ori
>s slti
<s slti
>s sltiu
<s sltiu
>s xori
<s xori
>s lb
<s lb
>s lbu
<s lbu
>s lh
<s lh
>s lhu
<s lhu
>s lw
<s lw
>s sb
<s sb
>s sh
<s sh
>s sw
<s sw
00 c_addi
>0 c_addi
<0 c_addi
<s c_addi
>s c_addi
00 c_andi
>0 c_andi
<0 c_andi
<s c_andi
>s c_andi
c_and
c_or
c_xor
>s c_lw
<s c_lw
>s c_sw
<s c_sw