Files
micropython/ports
Alessandro Gatti c1882e4866 qemu-riscv: Enable native code generation by default.
This turns on the native RV32IMC code generator for the QEMU-based
RISC-V port, and removes tests that relies on native code generation
from the exclusion list (ie enables these tests).

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2024-06-21 15:07:03 +10:00
..
2024-03-07 16:25:17 +11:00