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0a433a02e1
The flash clock frequency may have been set to a different value by a bootloader. Set the frequency according to the configured value. Use a table of pre-calculated dividers to get the closest value for the flash frequency, achieving for MIMXRT10xx: 30 -> 30.85 MHz 50 -> 49.65 MHz 60 -> 60 MHz 75 -> 75.13 MHz 80 -> 80 MHz 100 -> 99.31 Mhz 133 -> 132.92 MHz 166 -> 166.15 MHz for MIMXRT1176: 30 -> 31 MHz 50 -> 52.8 MJz 60 -> 58.7 MHz 75 -> 75.4 MHz 80 -> 75.4 MHz 100 -> 105.6 MHz 133 -> 132 MHz 166 -> 176 MHz Signed-off-by: robert-hh <robert@hammelrath.com>
118 lines
4.4 KiB
C
118 lines
4.4 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2023 Philipp Ebensberger
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "flash.h"
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void flash_init(void) {
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// Upload the custom flash configuration
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// And fix the entry for PAGEPROGRAM_QUAD
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// Update the flash CLK
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flexspi_nor_update_lut_clk(MICROPY_HW_FLASH_CLK);
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// Configure FLEXSPI IP FIFO access.
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BOARD_FLEX_SPI->MCR0 &= ~(FLEXSPI_MCR0_ARDFEN_MASK);
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BOARD_FLEX_SPI->MCR0 &= ~(FLEXSPI_MCR0_ATDFEN_MASK);
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BOARD_FLEX_SPI->MCR0 |= FLEXSPI_MCR0_ARDFEN(0);
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BOARD_FLEX_SPI->MCR0 |= FLEXSPI_MCR0_ATDFEN(0);
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}
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// flash_erase_block(erase_addr)
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// erases the block starting at addr. Block size according to the flash properties.
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__attribute__((section(".ram_functions"))) status_t flash_erase_block(uint32_t erase_addr) {
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status_t status = kStatus_Fail;
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__disable_irq();
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SCB_DisableDCache();
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status = flexspi_nor_flash_erase_block(BOARD_FLEX_SPI, erase_addr);
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SCB_EnableDCache();
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__enable_irq();
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return status;
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}
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// flash_erase_sector(erase_addr_bytes)
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// erases the sector starting at addr. Sector size according to the flash properties.
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__attribute__((section(".ram_functions"))) status_t flash_erase_sector(uint32_t erase_addr) {
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status_t status = kStatus_Fail;
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__disable_irq();
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SCB_DisableDCache();
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status = flexspi_nor_flash_erase_sector(BOARD_FLEX_SPI, erase_addr);
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SCB_EnableDCache();
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__enable_irq();
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return status;
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}
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// flash_write_block(flash_dest_addr_bytes, data_source, length_bytes)
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// writes length_byte data to the destination address
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// the vfs driver takes care for erasing the sector if required
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__attribute__((section(".ram_functions"))) status_t flash_write_block(uint32_t dest_addr, const uint8_t *src, uint32_t length) {
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status_t status = kStatus_Fail;
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uint32_t write_length;
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uint32_t next_addr;
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if (length == 0) {
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status = kStatus_Success; // Nothing to do
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} else {
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// write data in chunks not crossing a page boundary
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do {
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next_addr = dest_addr - (dest_addr % PAGE_SIZE_BYTES) + PAGE_SIZE_BYTES; // next page boundary
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write_length = next_addr - dest_addr; // calculate write length based on destination address and subsequent page boundary.
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if (write_length > length) { // compare possible write_length against remaining data length
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write_length = length;
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}
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__disable_irq();
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SCB_DisableDCache();
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status = flexspi_nor_flash_page_program(BOARD_FLEX_SPI, dest_addr, (uint32_t *)src, write_length);
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SCB_EnableDCache();
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__enable_irq();
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// Update remaining data length
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length -= write_length;
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// Move source and destination pointer
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src += write_length;
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dest_addr += write_length;
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} while ((length > 0) && (status == kStatus_Success));
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}
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return status;
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}
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// flash_read_block(flash_src_addr_bytes, data_dest, length_bytes)
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// read length_byte data to the source address
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// It is just a shim to provide the same structure for read_block and write_block.
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__attribute__((section(".ram_functions"))) void flash_read_block(uint32_t src_addr, uint8_t *dest, uint32_t length) {
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memcpy(dest, (const uint8_t *)(BOARD_FLEX_SPI_ADDR_BASE + src_addr), length);
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}
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