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https://github.com/micropython/micropython.git
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143 lines
4.8 KiB
C
143 lines
4.8 KiB
C
/*
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "pico.h"
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#include "clocks_extra.h"
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#include "hardware/regs/clocks.h"
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#include "hardware/platform_defs.h"
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#include "hardware/clocks.h"
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#include "hardware/watchdog.h"
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#include "hardware/pll.h"
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#include "hardware/xosc.h"
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#include "hardware/irq.h"
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#include "hardware/gpio.h"
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#include "hardware/ticks.h"
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#if PICO_RP2040
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// The RTC clock frequency is 48MHz divided by power of 2 (to ensure an integer
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// division ratio will be used in the clocks block). A divisor of 1024 generates
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// an RTC clock tick of 46875Hz. This frequency is relatively close to the
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// customary 32 or 32.768kHz 'slow clock' crystals and provides good timing resolution.
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#define RTC_CLOCK_FREQ_HZ (USB_CLK_KHZ * KHZ / 1024)
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#endif
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static void start_all_ticks(void) {
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uint32_t cycles = clock_get_hz(clk_ref) / MHZ;
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// Note RP2040 has a single tick generator in the watchdog which serves
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// watchdog, system timer and M0+ SysTick; The tick generator is clocked from clk_ref
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// but is now adapted by the hardware_ticks library for compatibility with RP2350
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// npte: hardware_ticks library now provides an adapter for RP2040
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for (int i = 0; i < (int)TICK_COUNT; ++i) {
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tick_start((tick_gen_num_t)i, cycles);
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}
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}
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// Wrap the SDK's clocks_init() function to save code size
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void __wrap_runtime_init_clocks(void) {
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runtime_init_clocks_optional_usb(true);
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}
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// Copy of runtime_init_clocks() from pico-sdk, with USB
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// PLL and clock init made optional (for light sleep wakeup).
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void runtime_init_clocks_optional_usb(bool init_usb) {
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// Disable resus that may be enabled from previous software
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clocks_hw->resus.ctrl = 0;
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// Enable the xosc
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xosc_init();
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// Before we touch PLLs, switch sys and ref cleanly away from their aux sources.
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hw_clear_bits(&clocks_hw->clk[clk_sys].ctrl, CLOCKS_CLK_SYS_CTRL_SRC_BITS);
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while (clocks_hw->clk[clk_sys].selected != 0x1) {
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tight_loop_contents();
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}
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hw_clear_bits(&clocks_hw->clk[clk_ref].ctrl, CLOCKS_CLK_REF_CTRL_SRC_BITS);
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while (clocks_hw->clk[clk_ref].selected != 0x1) {
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tight_loop_contents();
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}
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/// \tag::pll_init[]
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pll_init(pll_sys, PLL_COMMON_REFDIV, PLL_SYS_VCO_FREQ_HZ, PLL_SYS_POSTDIV1, PLL_SYS_POSTDIV2);
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if (init_usb) {
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pll_init(pll_usb, PLL_COMMON_REFDIV, PLL_USB_VCO_FREQ_HZ, PLL_USB_POSTDIV1, PLL_USB_POSTDIV2);
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}
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/// \end::pll_init[]
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// Configure clocks
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// todo amy, what is this N1,2,4 meant to mean?
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// RP2040 CLK_REF = XOSC (usually) 12MHz / 1 = 12MHz
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// RP2350 CLK_REF = XOSC (XOSC_MHZ) / N (1,2,4) = 12MHz
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// clk_ref aux select is 0 because:
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//
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// - RP2040: no aux mux on clk_ref, so this field is don't-care.
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//
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// - RP2350: there is an aux mux, but we are selecting one of the
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// non-aux inputs to the glitchless mux, so the aux select doesn't
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// matter. The value of 0 here happens to be the sys PLL.
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clock_configure(clk_ref,
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CLOCKS_CLK_REF_CTRL_SRC_VALUE_XOSC_CLKSRC,
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0, // No aux mux
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XOSC_KHZ * KHZ,
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XOSC_KHZ * KHZ);
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/// \tag::configure_clk_sys[]
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// CLK SYS = PLL SYS (usually) 125MHz / 1 = 125MHz
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clock_configure(clk_sys,
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CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX,
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CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS,
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SYS_CLK_KHZ * KHZ,
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SYS_CLK_KHZ * KHZ);
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/// \end::configure_clk_sys[]
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if (init_usb) {
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// CLK USB = PLL USB 48MHz / 1 = 48MHz
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clock_configure(clk_usb,
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0, // No GLMUX
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CLOCKS_CLK_USB_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
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USB_CLK_KHZ * KHZ,
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USB_CLK_KHZ * KHZ);
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}
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// CLK ADC = PLL USB 48MHZ / 1 = 48MHz
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clock_configure(clk_adc,
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0, // No GLMUX
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CLOCKS_CLK_ADC_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
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USB_CLK_KHZ * KHZ,
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USB_CLK_KHZ * KHZ);
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#if HAS_RP2040_RTC
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// CLK RTC = PLL USB 48MHz / 1024 = 46875Hz
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clock_configure(clk_rtc,
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0, // No GLMUX
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CLOCKS_CLK_RTC_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
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USB_CLK_KHZ * KHZ,
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RTC_CLOCK_FREQ_HZ);
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#endif
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// CLK PERI = clk_sys. Used as reference clock for UART and SPI serial.
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clock_configure(clk_peri,
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0,
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CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLK_SYS,
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SYS_CLK_KHZ * KHZ,
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SYS_CLK_KHZ * KHZ);
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#if PICO_RP2350
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// CLK_HSTX = clk_sys. Transmit bit clock for the HSTX peripheral.
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clock_configure(clk_hstx,
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0,
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CLOCKS_CLK_HSTX_CTRL_AUXSRC_VALUE_CLK_SYS,
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SYS_CLK_KHZ * KHZ,
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SYS_CLK_KHZ * KHZ);
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#endif
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// Finally, all clocks are configured so start the ticks
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// The ticks use clk_ref so now that is configured we can start them
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start_all_ticks();
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}
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