mirror of
https://github.com/andreas-abel/nanoBench.git
synced 2025-07-21 15:11:03 +02:00
22 lines
825 B
Plaintext
22 lines
825 B
Plaintext
# Performance monitoring events for processors based on the Haswell microarchitecture.
|
|
# Applies to processors with DisplayFamily_DisplayModel of 06_3CH, 06_45H and 06_46H.
|
|
# See Table 19-10 of Intel's "System Programming Guide" (Jan. 2019)
|
|
|
|
0E.01 UOPS_ISSUED.ANY
|
|
C2.01 UOPS_RETIRED.ALL
|
|
A1.01 UOPS_EXECUTED_PORT.PORT_0
|
|
A1.02 UOPS_EXECUTED_PORT.PORT_1
|
|
A1.04 UOPS_EXECUTED_PORT.PORT_2
|
|
A1.08 UOPS_EXECUTED_PORT.PORT_3
|
|
A1.10 UOPS_EXECUTED_PORT.PORT_4
|
|
A1.20 UOPS_EXECUTED_PORT.PORT_5
|
|
A1.40 UOPS_EXECUTED_PORT.PORT_6
|
|
A1.80 UOPS_EXECUTED_PORT.PORT_7
|
|
C4.00 BR_INST_RETIRED.ALL_BRANCHES
|
|
C5.00 BR_MISP_RETIRED.ALL_BRANCHES
|
|
D1.01 MEM_LOAD_UOPS_RETIRED.L1_HIT
|
|
D1.08 MEM_LOAD_UOPS_RETIRED.L1_MISS
|
|
D1.02 MEM_LOAD_UOPS_RETIRED.L2_HIT
|
|
D1.10 MEM_LOAD_UOPS_RETIRED.L2_MISS
|
|
D1.04 MEM_LOAD_UOPS_RETIRED.L3_HIT
|
|
D1.20 MEM_LOAD_UOPS_RETIRED.L3_MISS |