mirror of
https://github.com/RRZE-HPC/OSACA.git
synced 2025-07-21 12:41:05 +02:00
flake8 formatting
This commit is contained in:
@@ -11,7 +11,7 @@ from ruamel.yaml import YAML
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from osaca.db_interface import import_benchmark_output, sanity_check
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from osaca.frontend import Frontend
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from osaca.parser import BaseParser, ParserAArch64, ParserX86, ParserX86ATT, ParserX86Intel
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from osaca.parser import BaseParser, ParserAArch64, ParserX86ATT, ParserX86Intel
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from osaca.semantics import (
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INSTR_FLAGS,
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ArchSemantics,
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@@ -355,7 +355,7 @@ def inspect(args, output_file=sys.stdout):
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(arch, syntax)
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for arch in archs_to_try
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for syntax in syntaxes_to_try
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if (syntax != None) == (MachineModel.get_isa_for_arch(arch) == "x86")
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if (syntax is not None) == (MachineModel.get_isa_for_arch(arch) == "x86")
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]
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# Parse file.
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@@ -1,8 +1,5 @@
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#!/usr/bin/env python3
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import string
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import re
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import pyparsing as pp
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from osaca.parser import ParserX86
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@@ -34,11 +31,11 @@ class ParserX86ATT(ParserX86):
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InstructionForm(
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mnemonic="mov",
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operands=[ImmediateOperand(value=111), RegisterOperand(name="ebx")]
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),
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InstructionForm(
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mnemonic="movl",
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operands=[ImmediateOperand(value=111), RegisterOperand(name="ebx")]
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)
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),
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InstructionForm(
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mnemonic="movl",
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operands=[ImmediateOperand(value=111), RegisterOperand(name="ebx")]
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)
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],
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InstructionForm(
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directive_id=DirectiveOperand(name="byte", parameters=["100", "103", "144"])
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@@ -51,11 +48,11 @@ class ParserX86ATT(ParserX86):
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InstructionForm(
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mnemonic="mov",
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operands=[ImmediateOperand(value=222), RegisterOperand(name="ebx")]
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),
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InstructionForm(
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mnemonic="movl",
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operands=[ImmediateOperand(value=222), RegisterOperand(name="ebx")]
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)
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),
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InstructionForm(
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mnemonic="movl",
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operands=[ImmediateOperand(value=222), RegisterOperand(name="ebx")]
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)
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],
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InstructionForm(
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directive_id=DirectiveOperand(name="byte", parameters=["100", "103", "144"])
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@@ -1,8 +1,6 @@
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#!/usr/bin/env python3
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import pyparsing as pp
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import re
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import string
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import unicodedata
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from osaca.parser import ParserX86
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@@ -25,6 +23,7 @@ NON_ASCII_PRINTABLE_CHARACTERS = "".join(
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if unicodedata.category(chr(cp)) not in ("Cc", "Zl", "Zp", "Cs", "Cn")
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)
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# References:
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# ASM386 Assembly Language Reference, document number 469165-003, https://mirror.math.princeton.edu/pub/oldlinux/Linux.old/Ref-docs/asm-ref.pdf.
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# Microsoft Macro Assembler BNF Grammar, https://learn.microsoft.com/en-us/cpp/assembler/masm/masm-bnf-grammar?view=msvc-170.
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@@ -146,16 +145,18 @@ class ParserX86Intel(ParserX86):
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# A hack to help with comparison instruction: if the instruction is in the model, and has
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# exactly two sources, swap its operands.
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if (model and
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not has_destination and
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len(instruction_form.operands) == 2
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if (
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model
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and not has_destination
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and len(instruction_form.operands) == 2
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and not isa_model.get_instruction(
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mnemonic,
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instruction_form.operands
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) and not arch_model.get_instruction(
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mnemonic,
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instruction_form.operands
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)):
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)
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):
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instruction_form.operands.reverse()
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# If the instruction has a well-known data type, append a suffix.
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@@ -175,7 +176,6 @@ class ParserX86Intel(ParserX86):
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instruction_form.mnemonic = suffixed_mnemonic
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break
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def construct_parser(self):
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"""Create parser for x86 Intel ISA."""
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# Numeric literal.
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@@ -353,12 +353,15 @@ class ParserX86Intel(ParserX86):
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(pp.Literal("+") ^ pp.Literal("-")).setResultsName("sign")
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+ integer_number | identifier
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).setResultsName(self.immediate_id)
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pre_displacement = pp.Group(integer_number + pp.Literal("+")
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pre_displacement = pp.Group(
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integer_number + pp.Literal("+")
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).setResultsName(self.immediate_id)
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indexed = pp.Group(
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index_register.setResultsName("index")
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+ pp.Optional(pp.Literal("*")
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+ scale.setResultsName("scale"))
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+ pp.Optional(
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pp.Literal("*")
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+ scale.setResultsName("scale")
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)
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).setResultsName("indexed")
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register_expression = pp.Group(
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pp.Literal("[")
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@@ -370,7 +373,7 @@ class ParserX86Intel(ParserX86):
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+ pp.Literal("+")
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+ indexed).setResultsName("base_and_indexed")
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^ indexed
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).setResultsName("non_displacement")
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).setResultsName("non_displacement")
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+ pp.Optional(pp.Group(post_displacement).setResultsName("post_displacement"))
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+ pp.Literal("]")
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).setResultsName("register_expression")
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@@ -472,7 +475,7 @@ class ParserX86Intel(ParserX86):
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pp.CaselessKeyword("ALIAS")
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| pp.CaselessKeyword("ALIGN")
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| pp.CaselessKeyword("ASSUME")
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#| pp.CaselessKeyword("BYTE")
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# | pp.CaselessKeyword("BYTE")
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| pp.CaselessKeyword("CATSTR")
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| pp.CaselessKeyword("COMM")
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| pp.CaselessKeyword("COMMENT")
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@@ -482,7 +485,7 @@ class ParserX86Intel(ParserX86):
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| pp.CaselessKeyword("DQ")
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| pp.CaselessKeyword("DT")
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| pp.CaselessKeyword("DW")
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#| pp.CaselessKeyword("DWORD")
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# | pp.CaselessKeyword("DWORD")
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| pp.CaselessKeyword("ECHO")
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| pp.CaselessKeyword("END")
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| pp.CaselessKeyword("ENDP")
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@@ -491,14 +494,14 @@ class ParserX86Intel(ParserX86):
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| pp.CaselessKeyword("EVEN")
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| pp.CaselessKeyword("EXTRN")
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| pp.CaselessKeyword("EXTERNDEF")
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#| pp.CaselessKeyword("FWORD")
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# | pp.CaselessKeyword("FWORD")
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| pp.CaselessKeyword("GROUP")
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| pp.CaselessKeyword("INCLUDE")
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| pp.CaselessKeyword("INCLUDELIB")
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| pp.CaselessKeyword("INSTR")
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| pp.CaselessKeyword("INVOKE")
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| pp.CaselessKeyword("LABEL")
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#| pp.CaselessKeyword("MMWORD")
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# | pp.CaselessKeyword("MMWORD")
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| pp.CaselessKeyword("OPTION")
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| pp.CaselessKeyword("ORG")
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| pp.CaselessKeyword("PAGE")
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@@ -507,27 +510,27 @@ class ParserX86Intel(ParserX86):
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| pp.CaselessKeyword("PROTO")
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| pp.CaselessKeyword("PUBLIC")
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| pp.CaselessKeyword("PUSHCONTEXT")
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#| pp.CaselessKeyword("QWORD")
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#| pp.CaselessKeyword("REAL10")
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#| pp.CaselessKeyword("REAL4")
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#| pp.CaselessKeyword("REAL8")
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# | pp.CaselessKeyword("QWORD")
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# | pp.CaselessKeyword("REAL10")
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# | pp.CaselessKeyword("REAL4")
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# | pp.CaselessKeyword("REAL8")
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| pp.CaselessKeyword("RECORD")
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#| pp.CaselessKeyword("SBYTE")
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#| pp.CaselessKeyword("SDWORD")
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# | pp.CaselessKeyword("SBYTE")
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# | pp.CaselessKeyword("SDWORD")
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| pp.CaselessKeyword("SEGMENT")
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| pp.CaselessKeyword("SIZESTR")
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| pp.CaselessKeyword("STRUCT")
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| pp.CaselessKeyword("SUBSTR")
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| pp.CaselessKeyword("SUBTITLE")
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#| pp.CaselessKeyword("SWORD")
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#| pp.CaselessKeyword("TBYTE")
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# | pp.CaselessKeyword("SWORD")
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# | pp.CaselessKeyword("TBYTE")
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| pp.CaselessKeyword("TEXTEQU")
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| pp.CaselessKeyword("TITLE")
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| pp.CaselessKeyword("TYPEDEF")
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| pp.CaselessKeyword("UNION")
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#| pp.CaselessKeyword("WORD")
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#| pp.CaselessKeyword("XMMWORD")
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#| pp.CaselessKeyword("YMMWORD")
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# | pp.CaselessKeyword("WORD")
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# | pp.CaselessKeyword("XMMWORD")
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# | pp.CaselessKeyword("YMMWORD")
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)
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self.directive = pp.Group(
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pp.Optional(~directive_keywords + directive_identifier)
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@@ -1,7 +1,5 @@
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#!/usr/bin/env python3
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"""Semantics opbject responsible for architecture specific semantic operations"""
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from dis import Instruction
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import sys
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import warnings
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from itertools import chain
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@@ -1,8 +1,6 @@
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#!/usr/bin/env python3
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import copy
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import os
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import signal
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import time
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from itertools import chain
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from multiprocessing import Manager, Process, cpu_count
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@@ -1,11 +1,8 @@
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#!/usr/bin/env python3
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from collections import OrderedDict
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from enum import Enum
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from functools import partial
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from osaca.parser import get_parser
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from osaca.parser.instruction_form import InstructionForm
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from osaca.parser.directive import DirectiveOperand
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from osaca.parser.identifier import IdentifierOperand
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from osaca.parser.immediate import ImmediateOperand
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from osaca.parser.memory import MemoryOperand
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@@ -13,6 +10,7 @@ from osaca.parser.register import RegisterOperand
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COMMENT_MARKER = {"start": "OSACA-BEGIN", "end": "OSACA-END"}
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# State of marker matching.
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# No: we have determined that the code doesn't match the marker.
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# Partial: so far the code matches the marker, but we have not reached the end of the marker yet.
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@@ -173,6 +171,7 @@ def get_marker(isa, syntax="ATT", comment=""):
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return start_marker, end_marker
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def match_line(parser, line, marker_line):
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"""
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Returns whether `line` matches `marker_line`.
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@@ -198,6 +197,7 @@ def match_line(parser, line, marker_line):
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else:
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return Matching.No
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def match_operands(line_operands, marker_line_operands):
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if len(line_operands) != len(marker_line_operands):
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return False
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@@ -207,6 +207,7 @@ def match_operands(line_operands, marker_line_operands):
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zip(line_operands, marker_line_operands)
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)
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def match_operand(line_operand, marker_line_operand):
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if (
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isinstance(line_operand, ImmediateOperand)
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@@ -221,14 +222,15 @@ def match_operand(line_operand, marker_line_operand):
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):
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return True
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if (
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isinstance(line_operand, MemoryOperand)
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and isinstance(marker_line_operand, MemoryOperand)
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and match_operand(line_operand.base, marker_line_operand.base)
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and match_operand(line_operand.offset, line_operand.offset)
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):
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isinstance(line_operand, MemoryOperand)
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and isinstance(marker_line_operand, MemoryOperand)
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and match_operand(line_operand.base, marker_line_operand.base)
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and match_operand(line_operand.offset, line_operand.offset)
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):
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return True
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return False
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def match_parameters(parser, line_parameters, marker_line_parameters):
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"""
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Returns whether `line_parameters` matches `marker_line_parameters`.
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@@ -238,13 +240,10 @@ def match_parameters(parser, line_parameters, marker_line_parameters):
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:return: Matching. In case of partial match, `marker_line_parameters` is modified and should be
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reused for matching the next line in the parsed assembly code.
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"""
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line_parameter_count = len(line_parameters)
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marker_line_parameter_count = len(marker_line_parameters)
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# The elements of `marker_line_parameters` are consumed as they are matched.
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for line_parameter in line_parameters:
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if not marker_line_parameters:
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break;
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break
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marker_line_parameter = marker_line_parameters[0]
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if not match_parameter(parser, line_parameter, marker_line_parameter):
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return Matching.No
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@@ -254,6 +253,7 @@ def match_parameters(parser, line_parameters, marker_line_parameters):
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else:
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return Matching.Full
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def match_parameter(parser, line_parameter, marker_line_parameter):
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if line_parameter.lower() == marker_line_parameter.lower():
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return True
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@@ -6,8 +6,6 @@ Unit tests for x86 Intel assembly parser
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import os
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import unittest
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from pyparsing import ParseException
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from osaca.parser import ParserX86Intel, InstructionForm
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from osaca.parser.directive import DirectiveOperand
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from osaca.parser.identifier import IdentifierOperand
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@@ -134,13 +132,13 @@ class TestParserX86Intel(unittest.TestCase):
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self.assertEqual(parsed_4.mnemonic, "mov")
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self.assertEqual(parsed_4.operands[0],
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RegisterOperand(name="EAX"))
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self.assertEqual(parsed_4.operands[1],
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MemoryOperand(offset=ImmediateOperand(
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identifier="cur_elements$",
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value=104
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),
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base=RegisterOperand(name="RBP")))
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self.assertEqual(
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parsed_4.operands[1],
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MemoryOperand(
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offset=ImmediateOperand(identifier="cur_elements$", value=104),
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base=RegisterOperand(name="RBP")
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)
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)
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self.assertEqual(parsed_5.mnemonic, "mov")
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self.assertEqual(parsed_5.operands[0],
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MemoryOperand(offset=ImmediateOperand(value=24),
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@@ -252,18 +250,21 @@ class TestParserX86Intel(unittest.TestCase):
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self.assertEqual(parsed[0].line_number, 1)
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# Check specifically that the values of the symbols defined by "=" were correctly
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# propagated.
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self.assertEqual(parsed[69],
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InstructionForm(mnemonic="mov",
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operands=[MemoryOperand(
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base=RegisterOperand("RBP"),
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offset=ImmediateOperand(
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value=4,
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identifier="r$1"
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)
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),
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ImmediateOperand(value=0)],
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line="\tmov\tDWORD PTR r$1[rbp], 0",
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line_number=73))
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self.assertEqual(
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parsed[69],
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InstructionForm(
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mnemonic="mov",
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operands=[
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MemoryOperand(
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base=RegisterOperand("RBP"),
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offset=ImmediateOperand(value=4, identifier="r$1")
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),
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ImmediateOperand(value=0)
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],
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line="\tmov\tDWORD PTR r$1[rbp], 0",
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line_number=73
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)
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)
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# Check a few lines to make sure that we produced something reasonable.
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self.assertEqual(parsed[60],
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InstructionForm(mnemonic="mov",
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|
@@ -314,11 +314,11 @@ class TestSemanticTools(unittest.TestCase):
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def test_src_dst_assignment_x86_intel(self):
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for instruction_form in self.kernel_x86_intel:
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with self.subTest(instruction_form=instruction_form):
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if instruction_form.semantic_operands is not None:
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self.assertTrue("source" in instruction_form.semantic_operands)
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self.assertTrue("destination" in instruction_form.semantic_operands)
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self.assertTrue("src_dst" in instruction_form.semantic_operands)
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with self.subTest(instruction_form=instruction_form):
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if instruction_form.semantic_operands is not None:
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self.assertTrue("source" in instruction_form.semantic_operands)
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self.assertTrue("destination" in instruction_form.semantic_operands)
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self.assertTrue("src_dst" in instruction_form.semantic_operands)
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def test_src_dst_assignment_AArch64(self):
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for instruction_form in self.kernel_AArch64:
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|
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