moved get_full_instruction_name() from HardwareModel to DBInterface

osaca/db_interface.py

@@ -602,6 +602,12 @@ def _get_full_instruction_name(instruction_form):
             if op.shape is not None:
                 op_attrs.append("shape:" + op.shape)
             operands.append("{}({})".format("register", ",".join(op_attrs)))
+        elif isinstance(op, MemoryOperand):
+            operands.append("mem")
+        elif isinstance(op, ImmediateOperand):
+            operands.append("imd")
+        else:
+            operands.append("<op>")
     return "{}  {}".format(instruction_form["name"].lower(), ",".join(operands))
 
 

osaca/semantics/hw_model.py

@@ -427,21 +427,6 @@ class MachineModel(object):
         data_ports = [x for x in filter(data_port.match, self._data["ports"])]
         return data_ports
 
-    @staticmethod
-    def get_full_instruction_name(instruction_form):
-        """Get one instruction name string including the mnemonic and all operands."""
-        operands = []
-        for op in instruction_form.operands:
-            op_attrs = []
-            if op.name is not None:
-                op_attrs.append("name:" + op.name)
-            if op.prefix is not None:
-                op_attrs.append("prefix:" + op.prefix)
-            if op.shape is not None:
-                op_attrs.append("shape:" + op.shape)
-            operands.append("{}({})".format("register", ",".join(op_attrs)))
-        return "{}  {}".format(instruction_form.mnemonic.lower(), ",".join(operands))
-
     @staticmethod
     def get_isa_for_arch(arch):
         """Return ISA for given micro-arch ``arch``."""

tests/test_db_interface.py

@@ -146,6 +146,34 @@ class TestDBInterface(unittest.TestCase):
         instr_3 = ["vfmadd132pd", (True, "")]
         self.assertEqual(dbi._scrape_from_felixcloutier(instr_3[0]), instr_3[1])
 
+    def test_human_readable_instr_name(self):
+        instr_form_x86 = dict(
+            name="vaddpd",
+            operands=[
+                RegisterOperand(name="xmm"),
+                RegisterOperand(name="xmm"),
+                RegisterOperand(name="xmm"),
+            ],
+        )
+        instr_form_arm = dict(
+            name="fadd",
+            operands=[
+                RegisterOperand(prefix="v", shape="s"),
+                RegisterOperand(prefix="v", shape="s"),
+                RegisterOperand(prefix="v", shape="s"),
+            ],
+        )
+        # test full instruction name
+        self.assertEqual(
+            _get_full_instruction_name(instr_form_x86),
+            "vaddpd  register(name:xmm),register(name:xmm),register(name:xmm)",
+        )
+        self.assertEqual(
+            _get_full_instruction_name(instr_form_arm),
+            "fadd  register(prefix:v,shape:s),register(prefix:v,shape:s),"
+            + "register(prefix:v,shape:s)",
+        )
+
     ##################
     # Helper functions
     ##################

tests/test_semantics.py

@@ -175,17 +175,6 @@ class TestSemanticTools(unittest.TestCase):
             test_mm_arm.get_instruction("b.someOtherName", [IdentifierOperand()]),
         )
 
-        # test full instruction name
-        self.assertEqual(
-            MachineModel.get_full_instruction_name(instr_form_x86_1),
-            "vaddpd  register(name:xmm),register(name:xmm),register(name:xmm)",
-        )
-        self.assertEqual(
-            MachineModel.get_full_instruction_name(instr_form_arm_1),
-            "fadd  register(prefix:v,shape:s),register(prefix:v,shape:s),"
-            + "register(prefix:v,shape:s)",
-        )
-
         # test get_store_tp
         self.assertEqual(
             test_mm_x86.get_store_throughput(