Julian Hammer 239bf40d2c removed id from repr output

2018-06-15 14:38:36 +02:00

.idea

this commit is a deadend

2018-06-06 17:11:50 +02:00

dev_test

fixed handwritten example code

2018-04-23 15:36:48 +02:00

bench.py

yay, an upgrade of llvmlite fixed my issues

2018-06-15 12:38:56 +02:00

jit.py

fix for same source and destination registers

2018-06-14 14:23:37 +02:00

op.py

removed id from repr output

2018-06-15 14:38:36 +02:00

tablegen.py

added support of correct dstsrc register constraints to tablegen

2018-06-14 15:55:42 +02:00

test.c

fixed target machine creation

2018-04-27 13:47:49 +02:00

Description

A Benchmark Toolkit for Assembly Instructions Using the LLVM JIT

AGPL-3.0 10 MiB

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