Lerking/asmbench

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Julian Hammer 50c4da06f6 updated output

2018-07-27 11:00:22 +02:00

this commit is a deadend

2018-06-06 17:11:50 +02:00

reduced register use in throughput mode

2018-07-11 16:23:22 +02:00

fixed handwritten example code

2018-04-23 15:36:48 +02:00

jit.py

code cleanups

2018-06-22 10:25:47 +02:00

LICENSE

added LICENSE and updated README.md

2018-07-24 13:12:53 +02:00

README.md

added LICENSE and updated README.md

2018-07-24 13:12:53 +02:00

run_SC18_SRC.py

updated output

2018-07-27 11:00:22 +02:00

setup.py

added LICENSE and updated README.md

2018-07-24 13:12:53 +02:00

tablegen.py

added support for iaca analysis

2018-07-10 14:26:19 +02:00

test.c

fixed target machine creation

2018-04-27 13:47:49 +02:00

README.md

pyasmjit

A instruction latency and throughput benchmarking framework for out-of-order architectures.

Usage