unified callee save register handling

src/NEON/adc-x_x_x-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -42,16 +50,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/adc-x_x_x-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -86,16 +94,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/add-x_x_i-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -42,16 +50,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/add-x_x_i-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -87,16 +95,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/add-x_x_x-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -43,16 +51,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/add-x_x_x-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -87,16 +95,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/addp-vd_vd_vd-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-	stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -40,16 +48,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/addp-vd_vd_vd-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/adds-x_x_i-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -42,16 +50,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/adds-x_x_i-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -87,16 +95,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/cmp-w_w-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -234,16 +242,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/cmp-x_x-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -234,16 +242,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/dup-d_vd-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/dup-d_vd-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -44,16 +52,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/dup-d_vd-il_1_2-fadd-vd_vd_vd-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -64,16 +72,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/dup-d_vd-il_1_2-fadd_vd_vd_vd-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -64,16 +72,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/dup-vd_x-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -43,16 +51,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fadd-LAT_order1.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -44,16 +52,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fadd-LAT_order2.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -44,16 +52,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fadd-d_d_d-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fadd-d_d_d-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -42,16 +50,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fadd-vd_vd_vd-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fadd-vd_vd_vd-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -42,16 +50,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fadd-vd_vd_vd-il_1_2-add-x_x_x-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -187,16 +195,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
 
         ret
 

src/NEON/fadd-vd_vd_vd-il_1_2-sub-x_x_i-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -57,16 +65,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
 
         ret
 

src/NEON/fadd-vd_vd_vd-il_1_3-add-x_x_x-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -63,16 +71,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
 
         ret
 

src/NEON/fadd-vd_vd_vd-il_2_1-mul-x_x_x-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -57,16 +65,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
 
         ret
 

src/NEON/fadd-vs_vs_vs-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fadd-vs_vs_vs-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -42,16 +50,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fadd-vs_vs_vs-il_1_2-add-x_x_x-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -57,16 +65,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
 
         ret
 

src/NEON/fdiv-d_d_d-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -67,16 +75,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fdiv-d_d_d-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -67,16 +75,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fdiv-vd_vd_vd-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -68,16 +76,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fdiv-vd_vd_vd-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -68,16 +76,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fdiv-vd_vd_vd-il_1_1-dup-d_vd-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -74,16 +82,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fdiv-vd_vd_vd-il_1_2-fadd-vd_vd_vd-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -78,16 +86,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fdiv-vs_vs_vs-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -68,16 +76,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fdiv-vs_vs_vs-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -68,16 +76,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fdiv-vs_vs_vs-il_1_32-dup-d_vd-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -95,16 +103,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fdiv-vs_vs_vs-il_1_60-fadd-vs_vs_vs-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -123,16 +131,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fmadd-d_d_d_d-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-	    stp x29, x30, [sp, -96]!
-	    stp x19, x20, [sp, 16]
-	    stp x21, x22, [sp, 32]
-	    stp x24, x25, [sp, 48]
-	    stp x26, x27, [sp, 64]
-	    str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-	    ldp x19, x20, [sp, 16]
-	    ldp x21, x22, [sp, 32]
-	    ldp x24, x25, [sp, 48]
-	    ldp x26, x27, [sp, 64]
-	    ldr x28, [sp, 80]
-	    ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fmadd-d_d_d_d-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-	    stp x29, x30, [sp, -96]!
-	    stp x19, x20, [sp, 16]
-	    stp x21, x22, [sp, 32]
-	    stp x24, x25, [sp, 48]
-	    stp x26, x27, [sp, 64]
-	    str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-	    ldp x19, x20, [sp, 16]
-	    ldp x21, x22, [sp, 32]
-	    ldp x24, x25, [sp, 48]
-	    ldp x26, x27, [sp, 64]
-	    ldr x28, [sp, 80]
-	    ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fmadd-s_s_s_s-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-	    stp x29, x30, [sp, -96]!
-	    stp x19, x20, [sp, 16]
-	    stp x21, x22, [sp, 32]
-	    stp x24, x25, [sp, 48]
-	    stp x26, x27, [sp, 64]
-	    str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-	    ldp x19, x20, [sp, 16]
-	    ldp x21, x22, [sp, 32]
-	    ldp x24, x25, [sp, 48]
-	    ldp x26, x27, [sp, 64]
-	    ldr x28, [sp, 80]
-	    ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fmadd-s_s_s_s-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-	    stp x29, x30, [sp, -96]!
-	    stp x19, x20, [sp, 16]
-	    stp x21, x22, [sp, 32]
-	    stp x24, x25, [sp, 48]
-	    stp x26, x27, [sp, 64]
-	    str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-	    ldp x19, x20, [sp, 16]
-	    ldp x21, x22, [sp, 32]
-	    ldp x24, x25, [sp, 48]
-	    ldp x26, x27, [sp, 64]
-	    ldr x28, [sp, 80]
-	    ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fmla-vd_vd_vd-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fmla-vd_vd_vd-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -65,16 +73,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fmla-vs_vs_vs-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fmla-vs_vs_vs-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -65,16 +73,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fmov-d_x-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -50,16 +58,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fmov-s_i-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -51,16 +59,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fmov-x_d-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -50,16 +58,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fmul-d_d_d-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fmul-d_d_d-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -42,16 +50,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fmul-vd_vd_vd-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fmul-vd_vd_vd-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -42,16 +50,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fmul-vs_vs_vs-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fmul-vs_vs_vs-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -42,16 +50,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fneg-vd_vd_vd-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -40,16 +48,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fneg-vd_vd_vd-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fneg-vs_vs_vs-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -40,16 +48,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fneg-vs_vs_vs-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/frecpe-vd_vd-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -68,16 +76,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/frecpe-vd_vd-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -74,16 +82,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/frecpe-vs_vs-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -68,16 +76,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/frecpe-vs_vs-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -74,16 +82,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fsqrt-vd_vd-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -75,16 +83,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fsqrt-vd_vd-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -73,16 +81,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fsqrt-vs_vs-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -75,16 +83,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fsqrt-vs_vs-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -73,16 +81,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fsub-vd_vd_vd-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fsub-vd_vd_vd-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -42,16 +50,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fsub-vs_vs_vs-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/fsub-vs_vs_vs-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -42,16 +50,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.4s, v13.4s, v14.4s, v15.4s}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.4s, v9.4s, v10.4s, v11.4s}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/ldp-d_d_mbo-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -47,16 +55,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/ldp-d_d_mbo-il_1_1-ldr-x_mb-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -59,16 +67,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/ldp-q_q_mbo-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -47,16 +55,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/ldp-q_q_mbp-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -51,16 +59,19 @@ loop:
 done:
         mov     sp, x24
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/ldp-q_q_mbp-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -56,16 +64,19 @@ loop:
 done:
         mov     sp, x24
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/ldp-x_x_mbo-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -45,16 +53,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/ldr-q_mb-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -56,16 +64,19 @@ loop:
 done:
         mov     sp, x24
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/ldr-q_mb-il_1_1-str-q_mb-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -55,16 +63,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/ldr-q_mb-il_1_1_1-str-q_mb-add-x_x_x-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
 
         mov     x4, N
@@ -63,16 +71,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/ldr-q_mb-il_2_1-str-q_mb-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
         mov     x24, sp
@@ -56,16 +64,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/ldr-q_mbi-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -104,16 +112,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/ldr-q_mbp-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -49,16 +57,19 @@ loop:
 done:
         mov     sp, x24
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/ldr-q_mbp-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -62,16 +70,19 @@ loop:
         bne       loop
 done:
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/ldr-x_mb-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -44,16 +52,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/ldr-x_mb-il_1_1-str-x_mb-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
         mov     x24, sp
@@ -54,16 +62,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/ldr-x_mb-il_2_1-str-x_mb-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
         mov     x24, sp
@@ -56,16 +64,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/mla-vd_vd_vd-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-	    stp x29, x30, [sp, -96]!
-	    stp x19, x20, [sp, 16]
-	    stp x21, x22, [sp, 32]
-	    stp x24, x25, [sp, 48]
-	    stp x26, x27, [sp, 64]
-	    str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -40,16 +48,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-	    ldp x19, x20, [sp, 16]
-	    ldp x21, x22, [sp, 32]
-	    ldp x24, x25, [sp, 48]
-	    ldp x26, x27, [sp, 64]
-	    ldr x28, [sp, 80]
-	    ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/mla-vd_vd_vd-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-	    stp x29, x30, [sp, -96]!
-	    stp x19, x20, [sp, 16]
-	    stp x21, x22, [sp, 32]
-	    stp x24, x25, [sp, 48]
-	    stp x26, x27, [sp, 64]
-	    str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-	    ldp x19, x20, [sp, 16]
-	    ldp x21, x22, [sp, 32]
-	    ldp x24, x25, [sp, 48]
-	    ldp x26, x27, [sp, 64]
-	    ldr x28, [sp, 80]
-	    ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/mla-vs_vs_vs-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-	    stp x29, x30, [sp, -96]!
-	    stp x19, x20, [sp, 16]
-	    stp x21, x22, [sp, 32]
-	    stp x24, x25, [sp, 48]
-	    stp x26, x27, [sp, 64]
-	    str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -40,16 +48,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-	    ldp x19, x20, [sp, 16]
-	    ldp x21, x22, [sp, 32]
-	    ldp x24, x25, [sp, 48]
-	    ldp x26, x27, [sp, 64]
-	    ldr x28, [sp, 80]
-	    ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/mla-vs_vs_vs-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-	    stp x29, x30, [sp, -96]!
-	    stp x19, x20, [sp, 16]
-	    stp x21, x22, [sp, 32]
-	    stp x24, x25, [sp, 48]
-	    stp x26, x27, [sp, 64]
-	    str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-	    ldp x19, x20, [sp, 16]
-	    ldp x21, x22, [sp, 32]
-	    ldp x24, x25, [sp, 48]
-	    ldp x26, x27, [sp, 64]
-	    ldr x28, [sp, 80]
-	    ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/mov-vb_vb-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -40,16 +48,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/mov-vb_vb-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/mov-x_x-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -40,16 +48,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/mov-x_x-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -51,16 +59,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/mul-v2s_v2s_v2s-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -40,16 +48,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/mul-v2s_v2s_v2s-TP.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -41,16 +49,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret
 

src/NEON/mul-v4s_v4s_v4s-LAT.S

@@ -13,16 +13,24 @@ ninst:
 latency:
 
         # push callee-save registers onto stack
-        sub            sp, sp, #64
-        st1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        sub            sp, sp, #64
-        st1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        stp x29, x30, [sp, -96]!
-        stp x19, x20, [sp, 16]
-        stp x21, x22, [sp, 32]
-        stp x24, x25, [sp, 48]
-        stp x26, x27, [sp, 64]
-        str x28, [sp, 80]
+        sub     sp, sp, #64
+        st1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp]
+        sub     sp, sp, #64
+        st1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp]
+        stp     x19, x20, [sp, -96]!
+        stp     x21, x22, [sp, 16]
+        stp     x23, x24, [sp, 32]
+        stp     x25, x26, [sp, 48]
+        stp     x27, x28, [sp, 64]
+        stp     x29, x30, [sp, 80]
 
         mov     x4, N
 
@@ -40,16 +48,19 @@ loop:
 done:
 
         # pop callee-save registers from stack
-        ldp x19, x20, [sp, 16]
-        ldp x21, x22, [sp, 32]
-        ldp x24, x25, [sp, 48]
-        ldp x26, x27, [sp, 64]
-        ldr x28, [sp, 80]
-        ldp x29, x30, [sp], 96
-        ld1            {v12.2d, v13.2d, v14.2d, v15.2d}, [sp]
-        add            sp, sp, #64
-        ld1            {v8.2d, v9.2d, v10.2d, v11.2d}, [sp]
-        add            sp, sp, #64
+        ldp     x19, x20, [sp]
+        ldp     x21, x22, [sp, 16]
+        ldp     x23, x24, [sp, 32]
+        ldp     x25, x26, [sp, 48]
+        ldp     x27, x28, [sp, 64]
+        ldp     x29, x30, [sp, 80]
+        add     sp, sp, #96
+        ld1     {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64
+        ld1     {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64
+        ld1     {v20.2d, v21.2d, v22.2d, v23.2d}, [sp], #64
+        ld1     {v16.2d, v17.2d, v18.2d, v19.2d}, [sp], #64
+        ld1     {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
+        ld1     {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
         
         ret