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https://github.com/micropython/micropython.git
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alif: Add support for pin alternate function selection.
Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
This commit is contained in:
iabdalkader
committed by
Damien George
Damien George
parent
039df0c884
commit
82bae652eb
@@ -51,6 +51,7 @@ INC += -Itinyusb_port
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GEN_PIN_MKPINS = mcu/make-pins.py
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GEN_PIN_PREFIX = mcu/pins_prefix.c
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GEN_PINS_BOARD_CSV = $(BOARD_DIR)/pins.csv
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GEN_PINS_MCU_CSV = mcu/ensemble_pin_alt.csv
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GEN_PINS_SRC = $(BUILD)/pins_board.c
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GEN_PINS_HDR = $(HEADER_BUILD)/pins_board.h
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@@ -263,6 +264,7 @@ $(BUILD)/firmware.bin: $(BUILD)/firmware.elf
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$(BUILD)/%_board.c $(HEADER_BUILD)/%_board.h: $(BOARD_DIR)/%.csv $(GEN_PIN_MKPINS) $(GEN_PIN_PREFIX) | $(HEADER_BUILD)
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$(ECHO) "GEN $@"
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$(Q)$(PYTHON) $(GEN_PIN_MKPINS) \
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--af-csv $(GEN_PINS_MCU_CSV) \
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--board-csv $(GEN_PINS_BOARD_CSV) \
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--prefix $(GEN_PIN_PREFIX) \
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--output-source $(GEN_PINS_SRC) \
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130
ports/alif/mcu/ensemble_pin_alt.csv
Normal file
130
ports/alif/mcu/ensemble_pin_alt.csv
Normal file
@@ -0,0 +1,130 @@
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Pin,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7
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P0_0,,OSPI,UART,I3C,UT,LPCAM,CAM,ANA
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P0_1,,OSPI,UART,I3C,UT,LPCAM,CAM,ANA
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P0_2,,OSPI,UART,I2C,UT,LPCAM,CAM,ANA
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P0_3,,OSPI,UART,I2C,UT,LPCAM,CAM,ANA
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P0_4,,OSPI,UART,PDM,I2C,UT,,ANA
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P0_5,,OSPI,UART,PDM,I2C,UT,,ANA
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P0_6,,OSPI,UART,PDM,I2C,UT,,ANA
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P0_7,,OSPI,UART,PDM,I2C,UT,CDC,ANA
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P1_0,,UART,SPI,I2C,UT,LPCAM,ETH,ANA
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P1_1,,UART,SPI,I2C,UT,LPCAM,ETH,ANA
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P1_2,,UART,SPI,I3C,UT,LPCAM,ETH,ANA
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P1_3,,UART,SPI,I3C,UT,LPCAM,ETH,ANA
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P1_4,,OSPI,UART,SPI,UT,LPCAM,ETH,ANA
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P1_5,,OSPI,UART,SPI,UT,LPCAM,ETH,ANA
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P1_6,,OSPI,UART,I2S,UT,LPCAM,ETH,ANA
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P1_7,,OSPI,UART,I2S,UT,LPCAM,ETH,ANA
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P2_0,,OSPI,UART,LPPDM,UT,LPCAM,ETH,ANA
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P2_1,,OSPI,UART,LPPDM,UT,LPCAM,ETH,ANA
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P2_2,,OSPI,UART,LPPDM,UT,LPCAM,ETH,ANA
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P2_3,,OSPI,UART,LPPDM,UT,LPCAM,CDC,ANA
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P2_4,,OSPI,LPI2S,SPI,UT,LPCAM,CAM,ANA
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P2_5,,OSPI,LPI2S,SPI,UT,LPCAM,CAM,ANA
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P2_6,,OSPI,LPI2S,SPI,UT,LPCAM,CAM,ANA
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P2_7,,OSPI,LPI2S,SPI,UT,LPCAM,CAM,ANA
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P3_0,,OSPI,UART,PDM,I2S,QEC,LPCAM,CAM
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P3_1,,OSPI,UART,PDM,I2S,QEC,LPCAM,CAM
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P3_2,,OSPI,PDM,I2S,I3C,QEC,LPCAM,CAM
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P3_3,,OSPI,PDM,I2S,I3C,QEC,LPCAM,CAM
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P3_4,,OSPI,UART,LPPDM,I2S,I2C,QEC,CAM
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P3_5,,OSPI,UART,LPPDM,SPI,I2C,QEC,CAM
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P3_6,,HFXO,LPUART,LPPDM,SPI,I2C,QEC,CAM
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P3_7,,JTAG,LPUART,LPPDM,SPI,I2C,QEC,CAM
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P4_0,,JTAG,,I2S,SPI,QEC,CDC,CAM
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P4_1,,JTAG,I2S,SPI,QEC,SD,CDC,CAM
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P4_2,,JTAG,,I2S,SPI,QEC,SD,CAM
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P4_3,,JTAG,,I2S,SPI,QEC,SD,CAM
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P4_4,,JTAG,I2S,SPI,FAULT,,,
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P4_5,,JTAG,SPI,FAULT,,,,
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P4_6,,JTAG,SPI,FAULT,,,,
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P4_7,,JTAG,SPI,FAULT,,,,
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P5_0,,OSPI,UART,PDM,SPI,I2C,UT,SD
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P5_1,,OSPI,UART,PDM,SPI,I2C,UT,SD
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P5_2,,OSPI,UART,PDM,SPI,LPI2C,UT,SD
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P5_3,,OSPI,UART,SPI,LPI2C,UT,SD,CDC
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P5_4,,OSPI,UART,PDM,SPI,UT,SD,CDC
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P5_5,,OSPI,UART,PDM,UT,SD,ETH,CDC
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# P5_6 doesn't really have OSPI on AF1 but it's needed for P10_7 to be in OSPI mode
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P5_6,,OSPI,UART,I2C,UT,SD,ETH,CDC
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P5_7,,OSPI,UART,I2C,UT,SD,ETH,
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P6_0,,OSPI,UART,PDM,UT,SD,ETH,
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P6_1,,OSPI,UART,PDM,UT,SD,ETH,
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P6_2,,OSPI,UART,,PDM,UT,SD,ETH
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P6_3,,OSPI,UART,,PDM,UT,SD,ETH
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P6_4,,OSPI,UART,,SPI,UT,SD,ETH
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P6_5,,OSPI,UART,,SPI,UT,SD,ETH
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P6_6,,OSPI,UART,,SPI,UT,SD,ETH
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P6_7,,OSPI,UART,PDM,SPI,UT,SD,ETH
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P7_0,,,CMP,SPI,I2C,UT,SD,
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P7_1,,,CMP,SPI,I2C,UT,SD,
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P7_2,,,UART,CMP,SPI,I2C,UT,SD
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P7_3,,,UART,CMP,SPI,I2C,UT,
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P7_4,,,LPUART,LPPDM,LPSPI,LPI2C,UT,
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P7_5,,,LPUART,,LPPDM,LPSPI,LPI2C,UT
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P7_6,,,LPUART,,LPPDM,LPSPI,I3C,UT
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P7_7,,,LPUART,,LPPDM,LPSPI,I3C,UT
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P8_0,,OSPI,AUDIO,FAULT,LPCAM,SD,CDC,CAM
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P8_1,,I2S,FAULT,LPCAM,SD,CDC,CAM,
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P8_2,,I2S,SPI,FAULT,LPCAM,SD,CDC,CAM
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P8_3,,I2S,SPI,FAULT,LPCAM,SD,CDC,CAM
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P8_4,,I2S,SPI,QEC,LPCAM,SD,CDC,CAM
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P8_5,,,SPI,QEC,LPCAM,SD,CDC,CAM
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P8_6,,,I2S,QEC,LPCAM,SD,CDC,CAM
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P8_7,,,I2S,QEC,LPCAM,SD,CDC,CAM
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P9_0,,,I2S,QEC,SD,CDC,CAM,
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P9_1,,LPUART,I2S,QEC,SD,CDC,CAM,
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P9_2,,LPUART,I2S,SPI,QEC,SD,CDC,CAM
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P9_3,,HFXO,UART,I2S,SPI,QEC,CDC,CAM
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P9_4,,UART,I2S,SPI,I2C,QEC,CDC,CAM
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P9_5,,OSPI,I2S,SPI,I2C,QEC,CDC,CAM
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P9_6,,OSPI,AUDIO,SPI,I2C,QEC,CDC,CAM
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P9_7,,OSPI,UART,SPI,I2C,QEC,CDC,CAM
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P10_0,,OSPI,UART,SPI,UT,LPCAM,CDC,CAM
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P10_1,,OSPI,,LPI2S,UT,LPCAM,CDC,CAM
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P10_2,,OSPI,,LPI2S,UT,LPCAM,CDC,CAM
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P10_3,,OSPI,,LPI2S,UT,LPCAM,CDC,CAM
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P10_4,,OSPI,,LPI2S,I2C,UT,ETH,CDC
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P10_5,,UART,I2S,SPI,I2C,UT,ETH,CDC
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P10_6,,UART,I2S,SPI,I2C,UT,ETH,CDC
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P10_7,,UART,I2S,SPI,I2C,UT,CDC,OSPI
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P11_0,,OSPI,UART,I2S,SPI,UT,ETH,CDC
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P11_1,,OSPI,UART,SPI,UT,ETH,CDC,
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P11_2,,OSPI,UART,LPPDM,SPI,UT,ETH,CDC
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P11_3,,OSPI,UART,LPPDM,SPI,UT,ETH,CDC
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P11_4,,OSPI,UART,PDM,LPSPI,UT,ETH,CDC
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P11_5,,OSPI,UART,PDM,LPSPI,UT,ETH,CDC
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P11_6,,OSPI,UART,LPPDM,LPSPI,UT,ETH,CDC
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P11_7,,OSPI,UART,LPPDM,LPSPI,UT,ETH,CDC
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P12_0,,OSPI,AUDIO,I2S,UT,CDC,,
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P12_1,,OSPI,UART,I2S,UT,CDC,,
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P12_2,,OSPI,UART,I2S,UT,CDC,,
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P12_3,,OSPI,UART,I2S,UT,CDC,,
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P12_4,,OSPI,SPI,UT,,CDC,,
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P12_5,,,SPI,UT,,CDC,,
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P12_6,,,SPI,UT,,CDC,,
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P12_7,,OSPI,,SPI,UT,CDC,,
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P13_0,,OSPI,,SPI,QEC,SD,CDC,
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P13_1,,OSPI,SPI,QEC,SD,CDC,,
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P13_2,,OSPI,SPI,QEC,SD,CDC,,
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P13_3,,OSPI,SPI,QEC,SD,CDC,,
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P13_4,,OSPI,LPI2S,QEC,SD,CDC,,
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P13_5,,OSPI,LPI2S,QEC,SD,CDC,,
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P13_6,,OSPI,LPI2S,QEC,SD,CDC,,
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P13_7,,OSPI,LPI2S,QEC,SD,CDC,,
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P14_0,,OSPI,UART,QEC,SD,,,
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P14_1,,OSPI,UART,,QEC,SD,,
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P14_2,,OSPI,UART,,QEC,SD,,
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P14_3,,OSPI,UART,,QEC,,,
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P14_4,,CMP,SPI,FAULT,,,,
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P14_5,,CMP,SPI,FAULT,,,,
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P14_6,,CMP,SPI,FAULT,,,,
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P14_7,,CMP,SPI,FAULT,,,,
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P15_0,,LPTMR,,,,,,
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P15_1,,LPTMR,,,,,,
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P15_2,,LPTMR,,,,,,
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P15_3,,LPTMR,,,,,,
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P15_4,,,,,,,,
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P15_5,,,,,,,,
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P15_6,,,,,,,,
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P15_7,,,,,,,,
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Can't render this file because it has a wrong number of fields in line 48.
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@@ -34,26 +34,36 @@ ADC12_ANA_MAP = {
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class AlifPin(boardgen.Pin):
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def __init__(self, cpu_pin_name):
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super().__init__(cpu_pin_name)
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self._afs = ["MP_HAL_PIN_ALT_NONE"] * 8
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# Called for each AF defined in the csv file for this pin.
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def add_af(self, af_idx, af_name, af):
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self._afs[af_idx] = f"MP_HAL_PIN_ALT_{af}"
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# Emit the struct which contains the pin instance.
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def definition(self):
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port, pin = self.name()[1:].split("_")
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adc12_periph, adc12_channel = ADC12_ANA_MAP.get(self.name(), (3, 7))
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base = "LPGPIO_BASE" if port == "15" else "GPIO{}_BASE".format(port)
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return (
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"{{ "
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".base = {{ .type = &machine_pin_type }}, "
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".gpio = (GPIO_Type *){base}, "
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".port = PORT_{port}, "
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".pin = PIN_{pin}, "
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".adc12_periph = {adc12_periph}, "
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".adc12_channel = {adc12_channel}, "
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".name = MP_QSTR_P{port}_{pin} "
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"{{\n"
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" .name = MP_QSTR_P{port}_{pin},\n"
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" .base = {{ .type = &machine_pin_type }},\n"
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" .gpio = (GPIO_Type *){base},\n"
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" .port = PORT_{port},\n"
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" .pin = PIN_{pin},\n"
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" .adc12_periph = {adc12_periph},\n"
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" .adc12_channel = {adc12_channel},\n"
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" .alt = {{{alt}}},\n"
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"}}".format(
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port=port,
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pin=pin,
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base=base,
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adc12_periph=adc12_periph,
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adc12_channel=adc12_channel,
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alt=", ".join([f"{af}" for af in self._afs]),
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)
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)
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@@ -76,7 +86,7 @@ class AlifPin(boardgen.Pin):
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class AlifPinGenerator(boardgen.PinGenerator):
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def __init__(self):
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# Use custom pin type above.
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super().__init__(pin_type=AlifPin)
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super().__init__(pin_type=AlifPin, enable_af=True)
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# Pre-define the pins (i.e. don't require them to be listed in pins.csv).
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for i in range(NUM_PORTS):
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@@ -169,6 +169,56 @@ uint64_t mp_hal_time_ns(void) {
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return 0;
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}
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void mp_hal_pin_config(const machine_pin_obj_t *pin, uint32_t mode,
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uint32_t pull, uint32_t speed, uint32_t drive, uint32_t alt, bool ren) {
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uint8_t alt_func = PINMUX_ALTERNATE_FUNCTION_0;
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uint8_t pad_ctrl = drive | speed | (ren ? PADCTRL_READ_ENABLE : 0);
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// Configure pull-up or pull-down.
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if (pull & MP_HAL_PIN_PULL_UP) {
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pad_ctrl |= PADCTRL_DRIVER_DISABLED_PULL_UP;
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}
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if (pull & MP_HAL_PIN_PULL_DOWN) {
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pad_ctrl |= PADCTRL_DRIVER_DISABLED_PULL_DOWN;
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}
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// Configure open-drain mode.
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if (mode == MP_HAL_PIN_MODE_OPEN_DRAIN) {
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pad_ctrl |= PADCTRL_DRIVER_OPEN_DRAIN;
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}
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// For ALT mode, find alternate function.
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if (mode == MP_HAL_PIN_MODE_ALT) {
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for (mp_uint_t i = 0; i < MP_ARRAY_SIZE(pin->alt); i++) {
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if (alt == pin->alt[i]) {
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alt_func = i;
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break;
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}
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}
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if (alt_func == PINMUX_ALTERNATE_FUNCTION_0) {
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mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("invalid pin af: %d"), alt);
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}
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}
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// Set pad config.
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pinconf_set(pin->port, pin->pin, alt_func, pad_ctrl);
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// For INPUT/OUTPUT/OD modes, set the GPIO direction.
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switch (mode) {
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case MP_HAL_PIN_MODE_INPUT:
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gpio_set_direction_input(pin->gpio, pin->pin);
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break;
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case MP_HAL_PIN_MODE_OUTPUT:
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case MP_HAL_PIN_MODE_OPEN_DRAIN:
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gpio_set_direction_output(pin->gpio, pin->pin);
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break;
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default:
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break;
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}
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}
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void system_tick_schedule_callback(void) {
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pendsv_schedule_dispatch(PENDSV_DISPATCH_SOFT_TIMER, soft_timer_handler);
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}
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@@ -74,12 +74,49 @@ extern ringbuf_t stdin_ringbuf;
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#define MP_HAL_PIN_MODE_INPUT (0)
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#define MP_HAL_PIN_MODE_OUTPUT (1)
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#define MP_HAL_PIN_MODE_OPEN_DRAIN (2)
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#define MP_HAL_PIN_MODE_ALT (3)
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#define MP_HAL_PIN_PULL_NONE (0)
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#define MP_HAL_PIN_PULL_UP (1)
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#define MP_HAL_PIN_PULL_DOWN (2)
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#define MP_HAL_PIN_DRIVE_2MA (PADCTRL_OUTPUT_DRIVE_STRENGTH_2MA)
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#define MP_HAL_PIN_DRIVE_4MA (PADCTRL_OUTPUT_DRIVE_STRENGTH_4MA)
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#define MP_HAL_PIN_DRIVE_8MA (PADCTRL_OUTPUT_DRIVE_STRENGTH_8MA)
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#define MP_HAL_PIN_DRIVE_12MA (PADCTRL_OUTPUT_DRIVE_STRENGTH_12MA)
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#define MP_HAL_PIN_SPEED_LOW (0)
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#define MP_HAL_PIN_SPEED_HIGH (PADCTRL_SLEW_RATE_FAST)
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#define mp_hal_pin_obj_t const machine_pin_obj_t *
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enum {
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MP_HAL_PIN_ALT_NONE = 0,
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MP_HAL_PIN_ALT_ANA,
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MP_HAL_PIN_ALT_AUDIO,
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MP_HAL_PIN_ALT_CAM,
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MP_HAL_PIN_ALT_CDC,
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MP_HAL_PIN_ALT_CMP,
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MP_HAL_PIN_ALT_ETH,
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MP_HAL_PIN_ALT_FAULT,
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MP_HAL_PIN_ALT_HFXO,
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MP_HAL_PIN_ALT_I2C,
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MP_HAL_PIN_ALT_I2S,
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MP_HAL_PIN_ALT_I3C,
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MP_HAL_PIN_ALT_JTAG,
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MP_HAL_PIN_ALT_LPCAM,
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MP_HAL_PIN_ALT_LPI2C,
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MP_HAL_PIN_ALT_LPI2S,
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MP_HAL_PIN_ALT_LPPDM,
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MP_HAL_PIN_ALT_LPSPI,
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MP_HAL_PIN_ALT_LPTMR,
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MP_HAL_PIN_ALT_LPUART,
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MP_HAL_PIN_ALT_OSPI,
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MP_HAL_PIN_ALT_PDM,
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MP_HAL_PIN_ALT_QEC,
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MP_HAL_PIN_ALT_SD,
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MP_HAL_PIN_ALT_SPI,
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MP_HAL_PIN_ALT_UART,
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MP_HAL_PIN_ALT_UT,
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};
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typedef struct _machine_pin_obj_t {
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mp_obj_base_t base;
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GPIO_Type *gpio;
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@@ -88,6 +125,7 @@ typedef struct _machine_pin_obj_t {
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uint8_t adc12_periph : 2;
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uint8_t adc12_channel : 3;
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qstr name;
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const uint8_t alt[8];
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} machine_pin_obj_t;
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mp_hal_pin_obj_t mp_hal_get_pin_obj(mp_obj_t pin_in);
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@@ -149,5 +187,8 @@ static inline void mp_hal_wake_main_task_from_isr(void) {
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// Defined for tinyusb support, nothing needs to be done here.
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}
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void mp_hal_pin_config(const machine_pin_obj_t *pin, uint32_t mode,
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uint32_t pull, uint32_t speed, uint32_t drive, uint32_t alt, bool ren);
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// Include all the pin definitions.
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#include "genhdr/pins_board.h"
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