Poll events during SPI transfer (USB fails during long transfers
otherwise). And add a timeout for the blocking transfer.
Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
This commit cleans up the single entry point integer-indexed load/store
emitters that have been built by merging the single operand type
load/store functions in 1f5ba6998b.
To follow the same convention found in RV32 and Xtensa emitters, the
function operand size is not named after the left shift amount to apply
to the initial offset to get its true byte offset, but by a generic
"operand size".
Also, those functions were updated to use the new MP_FIT_UNSIGNED macros
to perform bit width checks when figuring out which opcode encoding is
the best one to use.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit introduces a mechanism to customise the code that is
injected to the board when performing a test file upload and execution.
A new argument, --begin", is added so regular Python code can be
inserted in the injected fragment between the module file creation and
the effective file import. This is needed for running larger tests
(usually ones that have been pre-compiled with
"--via-mpy --emit native") on ESP8266, as that board does not have
enough memory to fit certain blocks of code unless additional
configuration is performed.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit reworks the Viper pointer boundary tests in order to make
them more accurate and easier to extend.
The tests are now easier to reason about in their output, using easier
to read values, and bit thresholds are now more configurable. If a new
conditional code sequence is introduced, adding a new bit threshold is
just a matter of adding a value into a tuple at the beginning of the
relevant test file.
Load tests have also been made more accurate, with better function
templates to test register-indexed operations.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit expands the implementation of Viper load/store operations
that are optimised for the x86 platform.
Like x86, x64 already implemented all necessary functions and all it
took to expose these to Viper after the infrastructure refactoring
was to add a few defines.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit expands the implementation of Viper load/store operations
that are optimised for the x86 platform.
Unlike other platforms, x86 already implemented all necessary
functions and all it took to expose these to Viper after the
infrastructure refactoring was to add a few defines.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit expands the implementation of Viper load/store operations
that are optimised for the Xtensa platform.
Now both load and store emitters should generate the shortest possible
sequence in all cases. Redundant specialised operation emitters have
been aliased to the general case implementation - this was the case of
integer-indexed load/store operations with a fixed offset of zero.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit expands the implementation of Viper load/store operations
that are optimised for the Arm platform.
Now both load and store emitters should generate the shortest possible
sequence in all cases. Redundant specialised operation emitters have
been folded into the general case implementation - this was the case of
integer-indexed load/store operations with a fixed offset of zero.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit expands the implementation of Viper load/store operations
that are optimised for the RV32 platform.
Given the way opcodes are encoded, all value sizes are implemented with
only two functions - one for loads and one for stores. This should
reduce duplication with existing operations and should, in theory, save
space as some code is removed. Both load and store emitters will
generate the shortest possible sequence (as long as the stack pointer is
not involved), using compressed opcodes when possible.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit adds two macros that lets check whether a given value can
fit an arbitrary number of bits, either as a signed or as an unsigned
number.
The native emitter code backends perform a lot of bit size checks to see
if a particular code sequence can be emitted instead of a generic one,
and each platform backend has its own ad-hoc macros (usually one per bit
count and signedness).
With these macros there's a single way to perform those checks, plus
there's no more chance for off-by-one mask length errors when dealing
with signed numbers.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This check, runtime-enabled by default in gcc 13 (and existing at least
since gcc 12, but runtime-disabled) changes the stack layout in ways that
are not compatible with assumptions spread across the core code (nlr, gc,
and stack checking).
Signed-off-by: Jeff Epler <jepler@gmail.com>
The resulting `firmware.zip` file is self contained with everything needed
to deploy the firmware, eg over SE UART.
Signed-off-by: Damien George <damien@micropython.org>
Add check to prevent calling recv on a socket in the listening state. This
prevents a crash/hard fault when user code mistakenly tries to recv on the
listening socket instead of on the accepted connection.
Add corresponding test case to demonstrate the bug.
Signed-off-by: Andrew Leech <andrew.leech@planetinnovation.com.au>
The H7 has a hardware UART FIFO, so it's worth enabling it, to reduce the
chance of missed incoming characters. Note that `HAL_UART_Init(&huart)`
does not activate the FIFO, it must be done explicitly by calling
`HAL_UARTEx_EnableFifoMode(&huart)`.
Signed-off-by: ennyKey <ennyKey@fn.de>
Add support for defining additional GC blocks via linker scripts. A board
would need to define `_gc_blocks_table_start` and `_gc_blocks_table_end`
and within that region have pairs of (address, length) for each GC block
to add.
Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
This pin is used for the camera clock on Portenta carrier, and vision
shield but it doesn't need to be reserved.
Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
Tested using gcc 7.3.1 which does not have the popcount built-in and uses
this fallback version. Without the fix, mpy-cross produces mpy files with
corrupt RISC-V machine code. With the fix, mpy-cross output is correct.
Signed-off-by: Damien George <damien@micropython.org>
CPython math.nan is positive with regards to copysign. The signaling bit
(aka sign flag) was incorrectly set.
In addition, REPR_C and REPR_D should only use the _true_ nan to prevent
system crash in case of hand-crafted floats. For instance, with REPR_C,
any nan-like float following the pattern
`01111111 1xxxxxxx xxxxxxxx xxxxx1xx` would be switched to an immediate
object or a qstr string. When the qstr index is too large, this would
cause a crash.
This commit fixes the issue, and adds the relevant test cases.
Signed-off-by: Yoctopuce dev <dev@yoctopuce.com>
When the symbol `__all__` is defined in a module, `mp_import_all()` should
import all listed symbols into the global environment, rather than relying
on the underscore-is-private default. This is the standard in CPython.
Each item is loaded in the same way as if it would be an explicit import
statement, and will invoke the module's `__getattr__` function if needed.
This provides a straightforward solution for fixing star import of modules
using a dynamic loader, such as `extmod/asyncio` (see issue #7266).
This improvement has been enabled at BASIC_FEATURES level, to avoid
impacting devices with limited ressources, for which star import is of
little use anyway.
Additionally, detailled reporting of errors during `__all__` import has
been implemented to match CPython, but this is only enabled when
ERROR_REPORTING is set to MICROPY_ERROR_REPORTING_DETAILED.
Signed-off-by: Yoctopuce dev <dev@yoctopuce.com>
Since MicroPython supports Zephyr v4.0.0, no need for overlay to enable
PWM. It is enabled by default for a while now.
Signed-off-by: Ayush Singh <ayush@beagleboard.org>
Only the board.json files are affected. No other file uses the
style "Sparkfun". The documentation is fine.
Signed-off-by: robert-hh <robert@hammelrath.com>
Any '_' variables/functions in frozen modules are currently printed, when
they shouldn't be. That's due to underscore names possibly existing
between the start and end qstrs which are used to print the auto-complete
matches. The underscore names should be skipped when iterating between the
two boundary qstrs.
The underscore attributes are removed from the extra coverage exp file
because tab completing "import <tab>" no longer lists modules beginning
with an underscore.
Signed-off-by: Andrew Leech <andrew.leech@planetinnovation.com.au>
This allows having {\xDD} in tests, which will be expanded to the given
hex character.
Signed-off-by: Andrew Leech <andrew.leech@planetinnovation.com.au>
Add `MICROPY_BOARD_LINKER_SCRIPT` to specify a custom linker script for rp2
boards/variants.
This may, for example, include a PSRAM region so that C buffers or
otherwise can be allocated into PSRAM.
Signed-off-by: Phil Howard <github@gadgetoid.com>
Allow `mpconfigboard.cmake` to specify a custom `MICROPY_BOARD_PINS` to
override `${MICROPY_BOARD_DIR}/pins.csv`.
Signed-off-by: Phil Howard <github@gadgetoid.com>
Set a default MICROPY_HW_FLASH_MAX_FREQ if PICO_FLASH_SPI_CLKDIV
is unset.
Use a divider of 4, which is the default in boot2_generic_03h.S.
Signed-off-by: Phil Howard <github@gadgetoid.com>
Assuming a 133MHz capable flash in 91cff8e4f1
caused `rp2_flash_set_timing_internal` to set out of range dividers for
some boards (anything with value of 4 and flash that doesn't tolerate
higher speeds).
This affected (at least) the XIAO RP2350 board, making it non-bootable.
Since Pico SDK's `PICO_FLASH_SPI_CLKDIV` is entirely unreliable on a system
with a variable system clock (users can change it at runtime) then use it
only to work out a default `MICROPY_HW_FLASH_MAX_FREQ`.
This value can be overridden in board config.
Note that RP2350's default clock is 150MHz, RP2040's is 125MHz and it has
been certified at 200MHz so it's quite possible that
`PICO_FLASH_SPI_CLKDIV` is unreliable even at standard RP2 clocks.
(If flash timings are marginal then this can manifest as instability rather
than outright failure.)
Fixes issue #17375.
Signed-off-by: Phil Howard <github@gadgetoid.com>
In different functions `machine_rtc_config.ext0_pin` is accessed where
SOC_PM_SUPPORT_EXT0_WAKEUP is not defined, fix that.
Signed-off-by: Meir Armon <meirarmon@gmail.com>
Previously, there was no test coverage of the "write failed" path. In
fact, the assertion would fire instead of gracefully raising a Python
exception.
Slightly re-organize the code to place the assertion later. Add a test
case which exercises all paths, and update the expected output.
Signed-off-by: Jeff Epler <jepler@gmail.com>
In #17384 it was decided that fixing this difference was not worth the code
size increase. So document it instead.
Signed-off-by: Jeff Epler <jepler@gmail.com>
gcc's "undefined behavior" sanitizer can catch a range of misbehaviors at
runtime that normally go unnoticed. These include integer and pointer
operations that are "undefined" per the relevant C specification.
This commit enables undefined behavior detection during a new unix
coverage-like build.
Signed-off-by: Jeff Epler <jepler@gmail.com>
By ensuring the value to be shifted is an unsigned of the appropriate type.
This fixes several runtime diagnostics such as:
../../py/binary.c:199:28: runtime error:
left shift of 32768 by 16 places
cannot be represented in type 'int'
Signed-off-by: Jeff Epler <jepler@gmail.com>
Unlike some boards like stm32, timer callbacks on the rp2 port are
unconditionally dispatched via mp_sched_schedule(), behaving like
soft IRQs with consequent GC jitter and delays.
Add a 'hard' keyword argument to the rp2 Timer constructor and init.
This defaults to False but if it is set True, the timer callback will
be dispatched in hard IRQ context rather than queued.
Signed-off-by: Chris Webb <chris@arachsys.com>
