Commit Graph

11 Commits

Author SHA1 Message Date
Alessandro Gatti
ca220b5fc5 py/nlrrv64: Add RISC-V RV64I NLR implementation.
Add custom NLR support for 64 bits RISC-V RV64I targets.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2024-10-03 12:06:19 +10:00
Andrew Leech
7e14680a83 py/objringio: Add micropython.RingIO() interface for general use.
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This commit adds a new `RingIO` type which exposes the internal ring-buffer
code for general use in Python programs.  It has the stream interface
making it similar to `StringIO` and `BytesIO`, except `RingIO` has a fixed
buffer size and is automatically safe when reads and writes are in
different threads or an IRQ.

This new type is enabled at the "extra features" ROM level.

Signed-off-by: Andrew Leech <andrew.leech@planetinnovation.com.au>
2024-09-19 18:00:44 +10:00
Angus Gratton
86f2c285eb py: Add new cstack API for stack checking, with limit margin macro.
Currently the stack limit margin is hard-coded in each port's call to
`mp_stack_set_limit()`, but on threaded ports it's fiddlier and can lead to
bugs (such as incorrect thread stack margin on esp32).

This commit provides a new API to initialise the C Stack in one function
call, with a config macro to set the margin.  Where possible the new call
is inlined to reduce code size in thread-free ports.

Intended replacement for `MP_TASK_STACK_LIMIT_MARGIN` on esp32.

The previous `stackctrl.h` API is still present and unmodified apart from a
deprecation comment.  However it's not available when the
`MICROPY_PREVIEW_VERSION_2` macro is set.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>
2024-08-14 12:55:45 +10:00
Damien George
9dbc787ce8 py/emitndebug: Add native debug emitter.
This emitter prints out pseudo-machine instructions, instead of the usual
output of the native emitter.  It can be enabled on any port via
`MICROPY_EMIT_NATIVE_DEBUG` (make sure other native emitters are disabled)
but the easiest way to use it is with mpy-cross:

    $ mpy-cross -march=debug file.py

Signed-off-by: Damien George <damien@micropython.org>
2024-06-21 16:21:27 +10:00
Alessandro Gatti
8338f66352 py/asmrv32: Add RISC-V RV32IMC native code emitter.
This adds a native code generation backend for RISC-V RV32I CPUs, currently
limited to the I, M, and C instruction sets.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2024-06-21 15:06:07 +10:00
Alessandro Gatti
e6ae699998 py/nlrrv32: Add RISC-V RV32I NLR implementation.
Add custom NLR support for 32 bits RISC-V RV32I targets.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2024-06-06 11:56:58 +10:00
Jim Mussared
45ac651d1a all: Rename *umodule*.c to remove the "u" prefix.
Updates any includes, and references from Makefiles/CMake.

This essentially reverts what was done long ago in commit
136b5cbd76

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
2023-06-08 17:54:17 +10:00
Jan Willeke
40a3aa709c py/nlrmips: Add native NLR support for MIPS architecture.
This can be tested using ports/minimal and qemu:

    make CC=mips-linux-gnu-gcc-8

Then run with qemu-mips:

    stty raw opost -echo;
    QEMU_LD_PREFIX=/usr/mips-linux-gnu/ qemu-mips build/firmware.elf;
    sleep 1; reset

Signed-off-by: Jan Willeke <willeke@smartmote.de>
2022-11-15 17:09:49 +11:00
Damien George
5dcc9b3b16 py/py.cmake: Introduce MICROPY_INC_CORE as a list with core includes.
Signed-off-by: Damien George <damien@micropython.org>
2021-04-09 13:08:35 +10:00
Damien George
0fabda31de py/py.cmake: Move qstr helper code to micropy_gather_target_properties.
Signed-off-by: Damien George <damien@micropython.org>
2021-04-09 13:08:35 +10:00
Damien George
66098c0985 py,extmod: Add core cmake rule files.
These allow a port to use cmake natively instead of make.

Signed-off-by: Damien George <damien@micropython.org>
2021-02-15 12:48:18 +11:00