Commit Graph

63 Commits

Author SHA1 Message Date
Julian Hammer
cc51b232c2 workaround from ryzen / xen - llvm bug 2018-07-27 16:44:43 +02:00
Julian Hammer
d9bc86456d IACA report now available with -vvv 2018-07-27 14:40:16 +02:00
Julian Hammer
60ed2d2877 added zero runtime handling 2018-07-27 12:43:52 +02:00
Julian Hammer
e4c5b66741 handling overflow error in argument preperation 2018-07-27 12:30:18 +02:00
Julian Hammer
50c4da06f6 updated output 2018-07-27 11:00:22 +02:00
Julian Hammer
0dbf6b655b updated parameters 2018-07-26 16:35:32 +02:00
Julian Hammer
55ac8a142d added initial SRC script 2018-07-26 16:03:34 +02:00
Julian Hammer
6358dea1b0 added LICENSE and updated README.md 2018-07-24 13:12:53 +02:00
Julian Hammer
305f00f859 reduced register use in throughput mode 2018-07-11 16:23:22 +02:00
Julian Hammer
6786c399ad added support for iaca analysis 2018-07-10 14:26:19 +02:00
Julian Hammer
3dac7d6795 added cli support for serialized instructions 2018-07-05 14:25:15 +02:00
Julian Hammer
a4fee9bc06 removed development code 2018-07-05 12:50:01 +02:00
Julian Hammer
654e2cd62f finalizing CLI, started with mem support 2018-07-04 16:53:06 +02:00
Julian Hammer
7a6d2e91ce fixed random selection and initial value constants 2018-06-27 15:16:18 +02:00
Julian Hammer
0349de9e64 first CLI :) 2018-06-26 15:11:35 +02:00
Julian Hammer
39659ee257 first steps towards a usable lib and cli 2018-06-25 18:30:23 +02:00
Julian Hammer
5e52c3fe17 major cleanup in tablegen 2018-06-22 16:14:36 +02:00
Julian Hammer
437eaadad4 code cleanups 2018-06-22 10:25:47 +02:00
Julian Hammer
239bf40d2c removed id from repr output 2018-06-15 14:38:36 +02:00
Julian Hammer
780880e264 yay, an upgrade of llvmlite fixed my issues 2018-06-15 12:38:56 +02:00
Julian Hammer
8d79aed894 added support of correct dstsrc register constraints to tablegen 2018-06-14 15:55:42 +02:00
Julian Hammer
e9cc5d2a00 fix for same source and destination registers 2018-06-14 14:23:37 +02:00
Julian Hammer
7859acdaa2 bench is now up to speed with op 2018-06-13 17:23:22 +02:00
Julian Hammer
990f020684 new register naming scheme 2018-06-12 15:29:57 +02:00
Julian Hammer
598f231138 this commit is a deadend 2018-06-06 17:11:50 +02:00
Julian Hammer
03e35d48ce slow progess, but progress nonetheless 2018-05-30 14:22:02 +02:00
Julian Hammer
0b4ef84285 work in progress 2018-05-25 17:08:33 +02:00
Julian Hammer
e30e8b0a38 first complete x86 tablegen workflow (very dirty) 2018-05-23 17:32:20 +02:00
Julian Hammer
cb131f1007 slow porgress 2018-05-17 18:12:32 +02:00
Julian Hammer
bf191f71d1 first steps into parsing tablegen output 2018-05-15 16:37:12 +02:00
Julian Hammer
91a0a209d8 first compiling code after rewrite 2018-05-15 10:19:41 +02:00
Julian Hammer
6053bed320 reimplementation to represent basic block 2018-05-14 15:03:29 +02:00
Julian Hammer
537be3228f first try at a clean implementation 2018-05-09 18:55:49 +02:00
Julian Hammer
17c1311e3b wip 2018-05-09 13:12:44 +02:00
Julian Hammer
04dc52996d simplified template code 2018-05-07 15:34:09 +02:00
Julian Hammer
6cf44c3d93 initial support for complete lat and tp benchmark 2018-05-07 13:58:14 +02:00
Julian Hammer
913166cf17 example benchmarks are now clean 2018-05-04 14:14:14 +02:00
Julian Hammer
477ec2c78b added support for serial chains and dynamic iteration count scaling 2018-05-04 10:01:52 +02:00
Julian Hammer
745766249a resting fp loop 2018-05-02 10:46:22 +02:00
Julian Hammer
0e0f366be6 reduced complexity of load benchmarks 2018-04-27 16:49:05 +02:00
Julian Hammer
1b60a4b54f added support for dst_operands 2018-04-27 14:32:20 +02:00
Julian Hammer
ff57962ed2 added vmulpd 2018-04-27 13:59:08 +02:00
Julian Hammer
4a39c95270 fixed target machine creation 2018-04-27 13:47:49 +02:00
Julian Hammer
455297e68d split build process over seperate functions 2018-04-25 16:54:22 +02:00
Julian Hammer
85fa366dcb corrected naming 2018-04-25 16:27:55 +02:00
Julian Hammer
1dcf8bbddf reduced classes and code 2018-04-25 16:25:45 +02:00
Julian Hammer
e630a6ef48 adde throughput benchmarks for arithmetic, lea and load 2018-04-25 13:45:07 +02:00
Julian Hammer
50ec0b0674 fixed random pointer ring generation 2018-04-24 16:43:06 +02:00
Julian Hammer
216eac27cd enabled more load latency tests 2018-04-24 15:07:39 +02:00
Julian Hammer
5d122d1cad added load latency test 2018-04-24 14:50:09 +02:00