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Author	SHA1	Message	Date
JanLJL	45847e69ff	formatting for black	2025-08-16 14:13:29 +02:00
JanLJL	94cb3de6a1	fix bug to support 0x.. and ..R hex values for intel syntax	2025-08-16 14:08:43 +02:00
JanLJL	63cb61b423	add pseudo-ops for vcmpps/vcmppd	2025-08-14 13:34:45 +02:00
JanLJL	b68ce9afc1	new instructions	2025-08-13 14:43:17 +02:00
JanLJL	c274a25e1b	updated retired uops per cy	2025-08-13 14:42:45 +02:00
JanLJL	714319e613	new instructions	2025-08-13 14:42:30 +02:00
JanLJL	590f915f85	add fallback check w/ and w/o VEX prefix to AT&T to match intel syntax	2025-08-13 14:39:15 +02:00
Jan	b4978c724a	Merge pull request #117 from pleroy/Load2 ... Properly track the dependencies of the LOAD phase of instructions	2025-08-12 16:14:34 +02:00
pleroy	88d3f1a7a0	Fix a Flake8 diagnostic.	2025-07-29 18:55:51 +02:00
pleroy	5635d2d8df	Skip non-integer line numbers in frontend	2025-03-31 22:44:57 +02:00
pleroy	faa63ce95e	Support non-integer line numbers in frontend	2025-03-31 22:35:09 +02:00
pleroy	4578eb00fa	Flake8	2025-03-31 21:37:11 +02:00
pleroy	3456f6e24a	After egg’s review.	2025-03-31 20:48:52 +02:00
pleroy	df0351d087	Readying.	2025-03-31 20:48:39 +02:00
pleroy	969500d79f	Merge test	2025-03-31 20:47:46 +02:00
pleroy	685ed1e1e1	Graphing.	2025-03-31 20:45:20 +02:00
pleroy	af9c10f308	Cleanup.	2025-03-31 20:45:01 +02:00
pleroy	4255c11010	The tests are passing.	2025-03-31 20:44:36 +02:00
pleroy	56fbe1d172	Some more stuff.	2025-03-31 20:44:19 +02:00
pleroy	aeda9b1d33	Merge imports	2025-03-31 20:43:52 +02:00
Jan	33fd0a0352	Merge pull request #116 from eggrobin/graph-colouring ... Improvements to graph layout and colouring	2025-03-31 11:38:23 +02:00
Jan	a17e79a3a9	Merge pull request #115 from pleroy/Comisd ... Support for arithmetic shift and comparison instructions for x86	2025-03-31 11:18:09 +02:00
Robin Leroy	de0b1fde64	white on blue	2025-03-27 23:12:25 +01:00
Robin Leroy	d82bc8052b	Less clever and more useful colouring	2025-03-27 23:12:19 +01:00
Robin Leroy	b854562a82	Improve dependency graph colouring	2025-03-27 23:11:57 +01:00
Robin Leroy	8c31c6ff77	Mark backward edges as backward so the graph is ordered like the code	2025-03-27 23:11:46 +01:00
Robin Leroy	e096cf4704	Don’t spam filled until dot breaks	2025-03-27 23:11:35 +01:00
Robin Leroy	7d900fde38	Don’t run out of colours	2025-03-27 23:11:21 +01:00
pleroy	28df996617	Moar colors.	2025-03-27 23:11:13 +01:00
pleroy	1eb82a6f0a	Fix the x86 ISA description to indicate that the register of SAR and SAL is read/write.	2025-03-27 22:47:32 +01:00
Robin Leroy	b7e4acc905	ucomisd is like comisd	2025-03-27 22:46:48 +01:00
pleroy	b989145a36	Define comisd sources.	2025-03-27 22:46:38 +01:00
Jan	9c97d32512	Merge pull request #114 from eggrobin/setmeow-jmeow ... Add the x86 SET* and J* instructions	2025-03-26 09:05:23 +01:00
Robin Leroy	9e6373a013	Configure the dependencies of the jmeow instructions on flags	2025-03-20 22:30:00 +01:00
Robin Leroy	e99c3d935d	Add the setmeow instructions	2025-03-20 22:29:51 +01:00
JanLJL	edb32b38ca	use pypi version of kerncraft for GH Actions	2025-03-19 14:36:49 +01:00
JanLJL	2a231bf20b	version bump v0.7.0	2025-03-17 10:28:06 +01:00
JanLJL	fb8c8ec7db	remove AT&T limitation	2025-03-17 10:27:41 +01:00
Jan	2f069000e9	add syntax flag in README	2025-03-17 10:26:50 +01:00
Jan	bdbcb18817	Merge pull request #112 from pleroy/Intel ... Add support for the Intel syntax produced by MSVC and ICC	2025-03-17 10:20:40 +01:00
JanLJL	7930e4d704	take +- operator of offset/index in mem-addr into account	2025-03-14 18:46:12 +01:00
pleroy	d61330404b	Rewrite the parsing of register expressions. GCC, for reasons unknown, put the displacement in the middle. ... I am completely restructuring the parser definition so that they are more explicit. They are more verbose too, but at least I understand what they do.	2025-03-12 22:26:38 +01:00
pleroy	91da9a311a	Upper case the argument to the --syntax flag, otherwise 'att' means 'intel' :-/	2025-03-12 00:35:01 +01:00
pleroy	0c201be10e	Revert 62908f3b8f and fix a failure in tests.test_cli.TestCLI.test_without_arch while preserving the possibility to try more archs than the detected one.	2025-03-11 23:34:36 +01:00
JanLJL	2cf2bf5cec	Merge branch 'master' into merge-branch	2025-03-07 14:45:44 +01:00
JanLJL	4e3994fec1	added support for <Xd>! registers and [<Xd>]! mem addresses in Arm	2025-03-07 11:49:14 +01:00
JanLJL	ff727223bb	add setuptools to Install	2025-03-05 13:19:09 +01:00
JanLJL	306abcf0a6	specify commit for kerncraft	2025-03-05 12:54:55 +01:00
JanLJL	0b1ada14d0	undo unnecessary install	2025-03-05 11:01:47 +01:00
JanLJL	81dfb0e6cb	use local osaca version	2025-03-05 11:00:08 +01:00